74VHC08MTR STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 8
Technical content
■ HIGH SPEED: tPD = 4.3 ns (TYP.) at VCC = 5V ■ LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) ■ POWER DOWN PROTECTION ON INPUTS ■ SYMMETRICAL OUTPUT IMPEDANCE: OH | = IOL = 8mA (MIN) ■ BALANCED PROPAGATION DELAYS: t PLH ≅ tPHL ■ OPERATING VOLTAGE RANGE: V CC (OPR) = 2V to 5.5V ■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 08
■ IMPROVED LATCH-UP IMMUNITY ■ LOW NOISE: V OLP = 0.8V (MAX.)
DESCRIPTION
The 74VHC08 is an advanced high-speed CMOS QUAD 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. The internal circuit is composed of 2 stages including buffer output, which provides high noise immunity and stable output. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74VHC08 QUAD 2-INPUT AND GATE PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R SOP 74VHC08M 74VHC08MTR TSSOP 74VHC08TTR TSSOPSOP
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION TRUTH TABLE ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied RECOMMENDED OPERATING CONDITIONS 1) VIN from 30% to 70% of VCC PIN No SYMBOL NAME AND FUNCTION 1, 4, 9, 12 1A to 4A Data Inputs 2, 5, 10, 13 1B to 4B Data Inputs 3, 6, 8, 11 1Y to 4Y Data Outputs
7 GND Ground (0V)
14 V CC Positive Supply Voltage
Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7.0 V VI DC Input Voltage -0.5 to +7.0 V VO DC Output Voltage -0.5 to V CC + 0.5 V IIK DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ICC or IGND DC V CC or Ground Current ± 50 mA Tstg Storage Temperature -65 to +150 °C TL Lead Temperature (10 sec) 300 °C Symbol Parameter Value Unit VCC Supply Voltage 2 to 5.5 V VI Input Voltage 0 to 5.5 V VO Output Voltage 0 to V CC V Top Operating Temperature -55 to 125 °C dt/dv Input Rise and Fall Time (note 1) (VCC = 3.3 ± 0.3V) (VCC = 5.0 ± 0.5V) 0 to 100 0 to 20 ns/V
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5V Symbol Parameter Test Condition Value UnitVCC (V) TA = 25°C -40 to 85°C -55 to 125°C VIH High Level Input Voltage 2.0 1.5 1.5 1.5 V3.0 to 5.5 0.7VCC 0.7VCC 0.7VCC VIL Low Level Input Voltage 2.0 0.5 0.5 0.5 V3.0 to 5.5 0.3VCC 0.3VCC 0.3VCC VOH High Level Output Voltage 2.0 I O =-50 µA 1.9 2.0 1.9 1.9 V 3.0 IO =-4 mA 2.58 2.48 2.4 4.5 IO =-8 mA 3.94 3.8 3.7 VOL Low Level Output Voltage V 3.0 IO =4 mA 0.36 0.44 0.55 4.5 IO =8 mA 0.36 0.44 0.55 II Input Leakage Current 0 to 5.5 VI = 5.5V or GND ± 0.1 ± 1 ± 1 µA ICC Quiescent Supply Current 5.5 VI = VCC or GND 22 0 2 0 µA Symbol Parameter Test Condition Value UnitVCC (V) C L (pF) TA = 25°C -40 to 85°C -55 to 125°C tPLH tPHL Propagation Delay Time
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC /4 (per gate) DYNAMIC SWITCHING CHARACTERISTICS 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz. Symbol Parameter Test Condition Value UnitTA = 25°C -40 to 85°C -55 to 125°C C IN Input Capacitance 6 1 01 01 0 p F C PD Power Dissipation Capacitance (note 1) 15 pF Symbol Parameter Test Condition Value UnitVCC (V) TA = 25°C -40 to 85°C -55 to 125°C VOLP Dynamic Low Voltage Quiet Output (note 1, 2) 5.0 C L = 50 pF 0.3 0.8 VVOLV -0.8 -0.3 VIHD Dynamic High Voltage Input (note 1, 3) 5.0 3.5 V VILD Dynamic Low Voltage Input (note 1, 3) 5.0 1.5 V
C L = 15/50pF or equivalent (includes jig and probe capacitance) R T = ZOUT of pulse generator (typically 50Ω ) WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
DIM. mm. inch A 1.75 0.068 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 8.55 8.75 0.336 0.344 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 7.62 0.300 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M 0.68 0.026 S8 ° ( m a x . ) SO-14 MECHANICAL DATA PO13G
DIM. mm. inch A 1.2 0.047 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 e 0.65 BSC 0.0256 BSC K0 ° 8 °0 ° 8 ° TSSOP14 MECHANICAL DATA c Eb A2A D PIN 1 IDENTIFICATION LKe 0080337D
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com