74VHC02 FAIRCHILD | Alldatasheet

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I High Speed: tPD /c32 3.6 ns (typ) at VCC /c32 5V I Low power dissipation: ICC /c32 2 /c80 A (max) at TA /c32 25/c113 C I High noise immunity: VNIH /c32 VNIL /c32 28% VCC (min) I Power down protection is provided on all inputs I Low noise: VOLP /c32 0.8V (max) I Pin and function compatible with 74HC02 Ordering Code: Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Symbol IEEE/IEC Pin Descriptions Connection Diagram Truth Table Order Number Package Package DescriptionNumber 74VHC02M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHC02MX_NL (Note 1) M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHC02SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC02MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC02MTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC02N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Pin Names Description An, Bn Inputs O n Outputs ABO LLH LHL HLL HHL

www.fairchildsemi.com 2 74VHC02 Absolute Maximum Ratings(Note 2) Recommended Operating Conditions (Note 3) Note 2: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifica- tions should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading vari- ables. Fairchild does not recommend operation outside databook specifica- tions. Note 3: Unused inputs must be held HIGH or LOW. They may not float. Noise Characteristics Note 4: Parameter guaranteed by design. Supply Voltage (VCC ) /c16 0.5V to /c14 7.0V DC Input Voltage (VIN) /c16 0.5V to /c14 7.0V DC Output Voltage (VOUT ) /c16 0.5V to VCC /c14 0.5V Input Diode Current (IIK) /c16 20 mA Output Diode Current (IOK ) /c114 20 mA DC Output Current (IOUT ) /c114 25 mA DC V CC /GND Current (ICC ) /c114 50 mA Storage Temperature (TSTG ) /c16 65/c113 C to /c14 150/c113 C Lead Temperature (TL) (Soldering, 10 seconds) 260 /c113 C Supply Voltage (VCC ) 2.0V to /c14 5.5V Input Voltage (VIN)0 V t o /c14 5.5V Output Voltage (VOUT ) 0V to V CC Operating Temperature (TOPR ) /c16 40/c113 C to /c14 85/c113 C Input Rise and Fall Time (tr, tf) VCC /c32 3.3V /c114 0.3V 0 /c97 100 ns/V VCC /c32 5.0V /c114 0.5V 0 /c97 20 ns/V Symbol Parameter VCC (V) TA /c32 25/c113 CT A /c32 /c16 40/c113 C to /c14 85/c113 C Units Conditions Min Typ Max Min Max VIH HIGH Level 2.0 1.50 1.50 V Input Voltage 3.0 /c16 5.5 0.7 VCC 0.7 VCC VIL LOW Level 2.0 0.50 0.50 V Input Voltage 3.0 /c16 5.5 0.3 V CC 0.3 VCC VOH HIGH Level 2.0 1.9 2.0 1.9 V IN /c32 VIH IOH /c32 /c16 50 /c80 A Output Voltage 3.0 2.9 3.0 2.9 V or V IL 4.5 4.4 4.5 4.4 3.0 2.58 2.48 V IOH /c32 /c16 4 mA 4.5 3.94 3.80 I OH /c32 /c16 8 mA VOL LOW Level 2.0 0.0 0.1 0.1 V IN /c32 VIH IOL /c32 50 /c80 A Output Voltage 3.0 0.0 0.1 0.1 V or V IL 4.5 0.0 0.1 0.1 3.0 0.36 0.44 V IOL /c32 4 mA 4.5 0.36 0.44 I OL /c32 8 mA IIN Input Leakage Current 0 /c16 5.5 /c114 0.1 /c114 1.0 /c80 AV IN /c32 5.5V or GND ICC Quiescent Supply Current 5.5 2.0 20.0 /c80 AV IN /c32 VCC or GND Symbol Parameter VCC (V) TA /c32 25/c113 C Units Conditions Typ Limits VOLP Quiet Output Maximum 5.0 0.3 0.8 V C L /c32 50 pF (Note 4) Dynamic VOL VOLV Quiet Output Minimum 5.0 /c16 0.3 /c16 0.8 V C L /c32 50 pF (Note 4) Dynamic VOL VIHD Minimum HIGH Level 5.0 3.5 V C L /c32 50 pF (Note 4) Dynamic Input Voltage VILD Maximum LOW Level 5.0 1.5 V C L /c32 50 pF (Note 4) Dynamic Input Voltage

3 www.fairchildsemi.com 74VHC02 Note 5: C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) /c32 CPD * VCC * fIN /c14 ICC /4 (per gate). Symbol Parameter VCC TA /c32 25/c113 CT A /c32 /c16 40/c113 C to /c14 85/c113 C Units Conditions (V) Min Typ Max Min Max ns C L /c32 15 pF tPLH 8.1 11.4 1.0 13.0 C L /c32 50 pF ns C L /c32 15 pF 5.1 7.5 1.0 8.5 C L /c32 50 pF C IN Input Capacitance 4 10 10 pF V CC /c32 Open C PD Power Dissipation 15 pF (Note 5) Capacitance

www.fairchildsemi.com 4 74VHC02 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A

5 www.fairchildsemi.com 74VHC02 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D

www.fairchildsemi.com 6 74VHC02 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

7 www.fairchildsemi.com 74VHC02 Quad 2-Input NOR Gate Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com