74VCX16500

74VCX16500_04 FAIRCHILD | Alldatasheet

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I 1.4V to 3.6V VCC supply operation I 3.6V tolerant inputs and outputs I tPD (A to B, B to A) 2.9 ns max for 3.0V to 3.6V VCC I Power-down high impedance inputs and outputs I Supports live insertion/withdrawal (Note 1) I Static Drive (IOH /IOL ) ±24 mA @ 3.0V VCC I Uses patented noise/EMI reduction circuitry I Latchup performance exceeds 300 mA I ESD performance: Human body model > 2000V Machine model >200V Note 1: To ensure the high-impedance state during power up or power down, OEBA should be t ied to VCC through a pull-up resistor and OEAB should be tied to GND through a pull-down resistors; the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Devices also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Order Number Package Number Package Description 74VCX16500MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

www.fairchildsemi.com 2 74VCX16500 Connection Diagram Pin Descriptions Function Table (Note 2) H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial (HIGH or LOW, inputs may not float) Z = High Impedance Note 2: A-to-B data flow is shown; B-to-A flow is similar but uses OEBA, LEBA and CLKBA . OEBA is active LOW. Note 3: Output level before the indicated steady-state input conditions were established. Note 4: Output level before the indicated steady-state input conditions were established, provided that CLKAB was LOW before LEAB went LOW. Pin Names Description OEAB Output Enable Input for A to B Direction (Active HIGH) OEBA Output Enable Input for B to A Direction (Active LOW) LEAB, LEBA Latch Enable Inputs CLKAB , CLKBA Clock Inputs A1–A18 Side A Inputs or 3-STATE Outputs B1–B18 Side B Inputs or 3-STATE Outputs Inputs Outputs OEAB LEAB CLKAB A n B n LXXX Z HHXL L HHXH H HL ↓ LL HL ↓ HH HLHX B 0 (Note 3) HLLX B 0 (Note 4)

3 www.fairchildsemi.com 74VCX16500 Logic Diagram

www.fairchildsemi.com 4 74VCX16500 Absolute Maximum Ratings(Note 5) Recommended Operating Conditions (Note 7) Note 5: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Rat- ings. The Recommended Operating Conditions tables will define the condi- tions for actual device operation. Note 6: I O Absolute Maximum Rating must be observed. Note 7: Floating or unused pin (inputs or I/O's) must be held HIGH or LOW. Supply Voltage (VCC ) −0.5V to +4.6V DC Input Voltage (VI) −0.5V to +4.6V Output Voltage (VO ) Outputs 3-STATED −0.5V to +4.6V Outputs Active (Note 6) −0.5 to VCC + 0.5V DC Input Diode Current (IIK) VI < 0V −50 mA DC Output Diode Current (IOK ) VO < 0V −50 mA VO > VCC +50 mA DC Output Source/Sink Current (IOH /IOL ) ±50 mA DC V CC or Ground Current per Supply Pin (ICC or Ground) ±100 mA Storage Temperature Range (TSTG ) −65°C to +150°C Power Supply Operating 1.4V to 3.6V Input Voltage −0.3V to 3.6V Output Voltage (VO ) Output in Active States 0V to V CC Output in 3-STATE 0.0V to 3.6V Output Current in IOH /IOL VCC = 3.0V to 3.6V ±24 mA VCC = 2.3V to 2.7V ±18 mA VCC = 1.65V to 2.3V ±6 mA VCC = 1.4V to 1.6V ±2 mA Free Air Operating Temperature (TA) −40°C to +85°C Minimum Input Edge Rate (∆t/∆V) VIN = 0.8V to 2.0V, VCC = 3.0V 10 ns/V Symbol Parameter Conditions VCC Min Max Units (V) VIH HIGH Level Input Voltage 2.7 - 3.6 2.0 V 2.3 - 2.7 1.6 1.65 - 2.3 0.65 x VCC 1.4 - 1.6 0.65 x VCC VIL LOW Level Input Voltage 2.7 - 3.6 0.8 V 2.3 - 2.7 0.7 1.65 - 2.3 0.35 x V CC 1.4 - 1.6 0.35 x V CC VOH HIGH Level Output Voltage I OH = −100 µA 2.7 - 3.6 V CC - 0.2 V IOH = −12 mA 2.7 2.2 IOH = −18 mA 3.0 2.4 IOH = −24 mA 3.0 2.2 IOH = −100 µA 2.3 - 2.7 V CC - 0.2 IOH = −6 mA 2.3 2.0 IOH = −12 mA 2.3 1.8 IOH = −18 mA 2.3 1.7 IOH = −100 µA 1.65 - 2.3 V CC - 0.2 IOH = −6 mA 1.65 1.25 IOH = −100 µA 1.4 - 1.6 V CC - 0.2 IOH = −2 mA 1.4 1.05

5 www.fairchildsemi.com 74VCX16500 Note 8: Outputs disabled or 3-STATE only. Symbol Parameter Conditions VCC Min Max Units (V) VOL LOW Level Output Voltage I OL = 100 µA 2.7 - 3.6 0.2 V IOL = 12 mA 2.7 0.4 IOL = 18 mA 3.0 0.4 IOL = 24 mA 3.0 0.55 IOL = 100 µA 2.3 - 2.7 0.2 IOL = 12 mA 2.3 0.4 IOL = 18 mA 2.3 0.6 IOL = 100 µA 1.65 - 2.3 0.2 IOL = 6 mA 1.65 0.3 IOL = 100 µA 1.4 - 1.6 0.2 IOL = 2 mA 1.4 0.35 II Input Leakage Current 0V ≤ VI ≤ 3.6V 2.7 - 3.6 ±5.0 µA IOZ 3-STATE Output Leakage 0V ≤ VO ≤ 3.6V 1.4 - 3.6 ±10.0 µA VI = VIH or VIL IOFF Power Off Leakage Current 0V ≤ (VI, VO ) ≤ 3.6V 0 10.0 µA ICC Quiescent Supply Current V I = VCC or GND 1.4 - 3.6 20.0 µA VCC ≤ (VI, VO ) ≤ 3.6V (Note 8) 1.4 - 3.6 ±20.0 ∆ICC Increase in ICC per Input V IH = VCC - 0.6V 2.7 - 3.6 750 µA

www.fairchildsemi.com 6 74VCX16500 Note 9: For CL = 50pF, add approximately 300ps to the AC maximum specification. Note 10: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL ) or LOW-to-HIGH (tOSLH ). Symbol Parameter Conditions VCC TA = − 40°C to +85°C Units Figure (V) Min Max Number fMAX Maximum Clock Frequency C L = 30 pF, RL = 500Ω 3.3 ± 0.3 250 MHz 2.5 ± 0.2 200 1.8 ± 0.15 100 C L = 15 pF, RL = 500Ω 1.5 ± 0.1 80.0 tPHL Propagation Delay C L = 30 pF, RL = 500Ω 3.3 ± 0.3 0.6 2.9 ns Figures 1, 2tPLH Bus-to-Bus 2.5 ± 0.2 0.8 3.5 1.8 ± 0.15 1.5 7.0 C L = 15 pF, RL = 2kΩ 1.5 ± 0.1 1.0 14.0 Figures 5, 6 tPHL Propagation Delay C L = 30 pF, RL = 500Ω 3.3 ± 0.3 0.6 4.2 ns Figures 1, 2tPLH Clock-to-Bus 2.5 ± 0.2 0.8 5.3 1.8 ± 0.15 1.5 9.8 C L = 15 pF, RL = 500Ω 1.5 ± 0.1 1.0 19.6 tPHL Propagation Delay C L = 30 pF, RL = 500Ω 3.3 ± 0.3 0.6 3.8 ns Figures 1, 2tPLH LE-to-Bus 2.5 ± 0.2 0.8 4.9 1.8 ± 0.15 1.5 9.8 C L = 15 pF, RL = 500Ω 1.5 ± 0.1 1.0 19.6 tPZL Output Enable Time C L = 30 pF, RL = 500Ω 3.3 ± 0.3 0.6 3.8 ns Figures 1, 3, 4tPZH 2.5 ± 0.2 0.8 4.9 1.8 ± 0.15 1.5 9.8 C L = 15 pF, RL = 2kΩ 1.5 ± 0.1 1.0 19.6 Figures 7, 9, 10 tPLZ Output Disable Time C L = 30 pF, RL = 500Ω 3.3 ± 0.3 0.6 3.7 ns Figures 1, 3, 4tPHZ 2.5 ± 0.2 0.8 4.2 1.8 ± 0.15 1.5 7.6 C L = 15 pF, RL = 2kΩ 1.5 ± 0.1 1.0 15.2 Figures 7, 9, 10 tS Setup Time C L = 30 pF, RL = 500Ω 3.3 ± 0.3 1.5 ns Figure 6 2.5 ± 0.2 1.5 1.8 ± 0.15 2.5 C L = 15 pF, RL = 500Ω 1.5 ± 0.1 3.0 tH Hold Time C L = 30 pF, RL = 500Ω 3.3 ± 0.3 1.0 ns Figure 6 2.5 ± 0.2 1.0 1.8 ± 0.15 1.0 C L = 15 pF, RL = 500Ω 1.5 ± 0.1 2.0 tW Pulse Width C L = 30 pF, RL = 500Ω 3.3 ± 0.3 1.5 ns Figure 5 2.5 ± 0.2 1.5 1.8 ± 0.15 4.0 C L = 15 pF, RL = 500Ω 1.5 ± 0.1 4.0 tOSHL Output to Output Skew C L = 30 pF, RL = 500Ω 3.3 ± 0.3 0.5 ns tOSLH (Note 10) 2.5 ± 0.2 0.5 1.8 ± 0.15 0.75 C L = 15 pF, RL = 2kΩ 1.5 ± 0.1 1.5

7 www.fairchildsemi.com 74VCX16500 Dynamic Switching Characteristics Capacitance Symbol Parameter Conditions VCC TA = +25°C Units (V) Typical VOLP Quiet Output Dynamic C L = 30 pF, VIH = VCC , VIL = 0V 1.8 0.25 VPeak VOL 2.5 0.6 3.3 0.8 VOLV Quiet Output Dynamic C L = 30 pF, VIH = VCC , VIL = 0V 1.8 −0.25 VValley VOL 2.5 −0.6 3.3 −0.8 VOHV Quiet Output Dynamic C L = 30 pF, VIH = VCC , VIL = 0V 1.8 1.5 VValley VOH 2.5 1.9 3.3 2.2 Symbol Parameter Conditions TA = +25°C Units C IN Input Capacitance V I = 0V or VCC 6.0 pF VCC = 1.8V, 2.5V, or 3.3V, C I/O Output Capacitance V I = 0V, or VCC , 7.0 pF VCC = 1.8V, 2.5V or 3.3V C PD Power Dissipation Capacitance V I = 0V or VCC , f = 10 MHz 20.0 pF VCC = 1.8V, 2.5V or 3.3V

www.fairchildsemi.com 10 74VCX16500 Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com