74VCX16374 FAIRCHILD | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 10

Technical content

Features

I 1.2V to 3.6V VCC supply operation I 3.6V tolerant inputs and outputs I tPD 3.0 ns max for 3.0V to 3.6V VCC I Power-off high impedance inputs and outputs I Supports live insertion and withdrawal (Note 1) I Static Drive (IOH /IOL ) /c114 24 mA @ 3.0V VCC I Uses patented noise/EMI reduction circuitry I Latch-up performance exceeds 300 mA I ESD performance: Human body model /c33 2000V Machine model /c33 200V I Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Note 2: Ordering code “G” indicates Trays. Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Order Number Package Number Package Descriptions 74VCX16374G (Note 2)(Note 3) BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide 74VCX16374MTD (Note 3) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

www.fairchildsemi.com 2 74VCX16374 Connection Diagrams Pin Assignment for TSSOP Pin Assignment for FBGA (Top Thru View) Pin Descriptions FBGA Pin Assignments Truth Tables H /c32 HIGH Voltage Level L /c32 LOW Voltage Level X /c32 Immaterial (HIGH or LOW, inputs may not float) Z /c32 High Impedance O 0 /c32 Previous O0 before HIGH-to-LOW of CP Pin Names Description OE n Output Enable Input (Active LOW) CP n Clock Pulse Input I0–I15 Inputs O 0–O 15 Outputs NC No Connect 123456 A O 0 NC OE 1 CP 1 NC I 0 B O 2 O 1 NC NC I 1 I2 C O 4 O 3 VCC VCC I3 I4 D O 6 O 5 GND GND I 5 I6 E O 8 O 7 GND GND I 7 I8 F O 10 O 9 GND GND I 9 I10 G O 12 O 11 VCC VCC I11 I12 H O 14 O 13 NC NC I 13 I14 J O 15 NC OE 2 CP 2 NC I 15 Inputs Outputs CP 1 OE 1 I0–I7 O 0–O 7 /c17 LHH /c17 LLL LLX O 0 XHXZ Inputs Outputs CP 2 OE 2 I8–I15 O 8–O 15 /c17 LHH /c17 LLL LLX O 0 XHXZ

3 www.fairchildsemi.com 74VCX16374 Functional Description The 74VCX16374 consists of sixteen edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The device is byte controlled with each byte func- tioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. Each clock has a buffered clock and buffered Output Enable common to all flip-flops within that byte. The description which follows applies to each byte. Each flip-flop will store the state of their individual I inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP n) transition. With the Output Enable (OEn) LOW, the contents of the flip-flops are avail- able at the outputs. When OEn is HIGH, the outputs go to the high impedance state. Operations of the OEn input does not affect the state of the flip-flops. Logic Diagram Byte 1 (0:7) Byte 2 (8:15) Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

www.fairchildsemi.com 4 74VCX16374 Absolute Maximum Ratings(Note 4) Recommended Operating Conditions (Note 6) Note 4: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Rat- ings. The “Recommended Operating Conditions” table will define the condi- tions for actual device operation. Note 5: I O Absolute Maximum Rating must be observed. Note 6: Floating or unused inputs must be held HIGH or LOW. Supply Voltage (VCC ) /c16 0.5V to /c14 4.6V DC Input Voltage (VI) /c16 0.5V to /c14 4.6V Output Voltage (VO ) Outputs 3-STATED /c16 0.5V to /c14 4.6V Outputs Active (Note 5) /c16 0.5V to VCC /c14 0.5V DC Input Diode Current (IIK) VI /c31 0V /c16 50 mA DC Output Diode Current (IOK ) VO /c31 0V /c16 50 mA VO /c33 VCC /c14 50 mA DC Output Source/Sink Current (IOH /IOL ) /c114 50 mA DC V CC or GND Current per Supply Pin (ICC or GND) /c114 100 mA Storage Temperature Range (TSTG ) /c16 65/c113 C to /c14 150/c113 C Power Supply Operating 1.2V to 3.6V Input Voltage /c16 0.3V to /c14 3.6V Output Voltage (VO ) Output in Active States 0V to V CC Output in “OFF ” State 0.0V to 3.6V Output Current in IOH /IOL VCC /c32 3.0V to 3.6V /c114 24 mA VCC /c32 2.3V to 2.7V /c114 18 mA VCC /c32 1.65V to 2.3V /c114 6 mA VCC /c32 1.4V to 1.6V /c114 2 mA VCC /c32 1.2V /c114 100 /c80 A Free Air Operating Temperature (TA) /c16 40/c113 C to /c14 85/c113 C Minimum Input Edge Rate (/c39 t//c39 V) VIN /c32 0.8V to 2.0V, VCC /c32 3.0V 10 ns/V Symbol Parameter Conditions VCC Min Max Units (V) VIH HIGH Level Input Voltage 2.7 - 3.6 2.0 V 2.3 - 2.7 1.6 1.65 - 2.3 0.65 x VCC 1.4 - 1.6 0.65 x VCC 1.2 0.65 x V CC VIL LOW Level Input Voltage 2.7 - 3.6 0.8 V 2.3 - 2.7 0.7 1.65 - 2.3 0.35 x V CC 1.4 - 1.6 0.35 x V CC 1.2 0.05 x V CC VOH HIGH Level Output Voltage I OH /c32 /c16 100 /c80 A 2.7 - 3.6 V CC - 0.2 V IOH /c32 /c16 12 mA 2.7 2.2 IOH /c32 /c16 18 mA 3.0 2.4 IOH /c32 /c16 24 mA 3.0 2.2 IOH /c32 /c16 100 /c80 A 2.3 - 2.7 V CC - 0.2 IOH /c32 /c16 6 mA 2.3 2.0 IOH /c32 /c16 12 mA 2.3 1.8 IOH /c32 /c16 18 mA 2.3 1.7 IOH /c32 /c16 100 /c80 A 1.65 - 2.3 V CC - 0.2 IOH /c32 /c16 6 mA 1.65 1.25 IOH /c32 /c16 100 /c80 A 1.4 - 1.6 V CC - 0.2 IOH /c32 /c16 2 mA 1.4 1.05 IOH /c32 /c16 100 /c80 A 1.2 V CC - 0.2

5 www.fairchildsemi.com 74VCX16374 Note 7: Outputs disabled or 3-STATE only. Symbol Parameter Conditions VCC Min Max Units (V) VOL LOW Level Output Voltage I OL /c32 100 /c80 A 2.7 - 3.6 0.2 V IOL /c32 12 mA 2.7 0.4 IOL /c32 18 mA 3.0 0.4 IOL /c32 24 mA 3.0 0.55 IOL /c32 100 /c80 A 2.3 - 2.7 0.2 IOL /c32 12 mA 2.3 0.4 IOL /c32 18 mA 2.3 0.6 IOL /c32 100 /c80 A 1.65 - 2.3 0.2 IOL /c32 6 mA 1.65 0.3 IOL /c32 100 /c80 A 1.4 - 1.6 0.2 IOL /c32 2 mA 1.4 0.35 IOL /c32 100 /c80 A 1.2 0.05 II Input Leakage Current 0 /c100 VI /c100 3.6V 1.2 - 3.6 /c114 5.0 /c80 A IOZ 3-STATE Output Leakage 0 /c100 VO /c100 3.6V 1.2 - 3.6 /c114 10 /c80 A VI /c32 VIH or VIL IOFF Power-OFF Leakage Current 0 /c100 (VI, VO ) /c100 3.6V 0 10 /c80 A ICC Quiescent Supply Current V I /c32 VCC or GND 1.2 - 3.6 20 /c80 A VCC /c100 (VI, VO ) /c100 3.6V (Note 7) 1.2 - 3.6 /c114 20 /c39 ICC Increase in ICC per Input V IH /c32 VCC /c16 0.6V 2.7 - 3.6 750 /c80 A Symbol Parameter Conditions VCC TA /c32 /c16 40/c113 C to /c14 85/c113 C Units Figure (V) Min Max Number fMAX Maximum Clock Frequency C L /c32 30 pF, RL /c32 500/c58 3.3 /c114 0.3 250 ns Figures 1, 22.5 /c114 0.2 200 1.8 /c114 0.15 100 C L /c32 15 pF, RL /c32 2k/c58 1.5 /c114 0.1 80 Figures 7, 81.2 40 tPHL , Propagation Delay CP to O n C L /c32 30 pF, RL /c32 500/c58 3.3 /c114 0.3 0.8 3.0 ns Figures 1, 2tPLH 2.5 /c114 0.2 1.0 3.9 1.8 /c114 0.15 1.5 7.8 C L /c32 15 pF, RL /c32 2k/c58 1.5 /c114 0.1 1.0 15.6 Figures 7, 81.2 1.5 39 tPZL , Output Enable Time C L /c32 30 pF, RL /c32 500/c58 3.3 /c114 0.3 0.8 3.5 ns Figures 1, 3, 4tPZH 2.5 /c114 0.2 1.0 4.6 1.8 /c114 0.15 1.5 9.2 C L /c32 15 pF, RL /c32 2k/c58 1.5 /c114 0.1 1.0 18.4 Figures 7, 9, 101.2 1.5 46 tPLZ , Output Disable Time C L /c32 30 pF, RL /c32 500/c58 3.3 /c114 0.3 0.8 3.5 ns Figures 1, 3, 4tPHZ 2.5 /c114 0.2 1.0 3.8 1.8 /c114 0.15 1.5 6.8 C L /c32 15 pF, RL /c32 2k/c58 1.5 /c114 0.1 1.0 13.6 Figures 7, 9, 101.2 1.5 34 tS Setup Time C L /c32 30 pF, RL /c32 500/c58 3.3 /c114 0.3 1.5 ns Figures 1, 62.5 /c114 0.2 1.5 1.8 /c114 0.15 2.5 C L /c32 15 pF, RL /c32 2k/c58 1.5 /c114 0.1 3.0 Figures 6, 71.2 6

www.fairchildsemi.com 6 74VCX16374 Note 8: For CL /c32 50PF, add approximately 300 ps to the AC maximum specification. Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL ) or LOW-to-HIGH (tOSLH ). Dynamic Switching Characteristics Capacitance Symbol Parameter Conditions VCC TA /c32 /c16 40/c113 C to /c14 85/c113 C Units Figure (V) Min Max Number tH Hold Time C L /c32 30 pF, RL /c32 500/c58 3.3 /c114 1.0 1.0 ns Figures 1, 62.5 /c114 0.2 1.0 1.8 /c114 0.15 1.0 C L /c32 15 pF, RL /c32 2k/c58 1.5 /c114 0.1 2.0 Figures 6, 71.2 6 tW Pulse Width C L /c32 30 pF, RL /c32 500/c58 3.3 /c114 0.3 1.5 ns Figures 1, 42.5 /c114 0.2 1.5 1.8 /c114 0.15 4.0 C L /c32 15 pF, RL /c32 2k/c58 1.5 /c114 0.1 4.0 Figures 4, 71.2 8 tOSHL Output to Output Skew C L /c32 30 pF, RL /c32 500/c58 3.3 /c114 0.3 0.5 ns tOSLH (Note 9) 2.5 /c114 0.2 0.5 1.8 /c114 0.15 0.75 C L /c32 15 pF, RL /c32 2k/c58 1.5 /c114 0.1 1.5 1.2 1.2 Symbol Parameter Conditions V CC (V) TA /c32 /c14 25/c113 C Units Typical VOLP Quiet Output Dynamic Peak VOL C L /c32 30 pF, VIH /c32 VCC , VIL /c32 0V 1.8 0.25 V2.5 0.6 3.3 0.8 VOLV Quiet Output Dynamic Valley VOL C L /c32 30 pF, VIH /c32 VCC , VIL /c32 0V 1.8 /c16 0.25 V2.5 /c16 0.6 3.3 /c16 0.8 VOHV Quiet Output Dynamic Valley VOH C L /c32 30 pF, VIH /c32 VCC , VIL /c32 0V 1.8 1.5 V2.5 1.9 3.3 2.2 Symbol Parameter Conditions TA /c32 /c14 25/c113 C Units Typical C IN Input Capacitance V CC /c32 1.8V, 2.5V or 3.3V, VI /c32 0V or VCC 6p F C OUT Output Capacitance V I /c32 0V or VCC , VCC /c32 1.8V, 2.5V or 3.3V 7 pF C PD Power Dissipation Capacitance V I /c32 0V or VCC , f /c32 10 MHz, 20 pF VCC /c32 1.8V, 2.5V or 3.3V

9 www.fairchildsemi.com 74VCX16374 Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

www.fairchildsemi.com 10 74VCX16374 Low Voltage 16-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Body Width Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com