74VCX16373 STMICROELECTRONICS | Alldatasheet

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■ 3.6V TOLERANT INPUTS AND OUTPUTS ■ HIGH SPEED : tPD = 3.0 ns (MAX.) at VCC =3 . 0t o3 . 6 V tPD = 3.4 ns (MAX.) at VCC =2 . 3t o2 . 7 V tPD = 6.8 ns (MAX.) at VCC =1 . 8 V ■ POWER DOWN PROTECTION ON INPUTS AND OUTPUTS ■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH |=IOL = 24mA (MIN) at VCC =3 . 0 V |IOH |=IOL = 18mA (MIN) at VCC =2 . 3 V |IOH |=IOL =6 m A( M I N )a tVCC =1 . 8 V ■ OPERATING VOLTAGE RANGE: V CC (OPR) = 1.8V to 3.6V ■ PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 16373

■ LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17) ■ ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V

DESCRIPTION

The 74VCX16373 is a low voltage CMOS 16 BIT D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and five-layer metal wiring C 2MOS technology. It is ideal for low power and very high speed 1.8 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs. These 16 bit D-TYPE latches are bite controlled by two latch enable inputs (nLE) and two output enable inputs (OE While the nLE input is held at a high level, the nQ outputs will follow the data input precisely. When the nLE is taken low, the nQ outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74VCX16373 LOW VOLTAGE CMOS 16-BIT D-TYPE LATCH (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS ORDER CODES PACKAGE TUBE T & R TSSOP 74VCX16373TTR TSSOP PIN CONNECTION

INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION TRUTH TABLE X : Don‘t Care Z : High Impedance * : Q outputs are latched at the time when the LE input is taken low logic level. IEC LOGIC SYMBOLS PIN No SYMBOL NAME AND FUNCTION 1 1OE 3 State Output Enable Input (Active LOW) 2, 3, 5, 6, 8, 9, 11, 12 1Q0 to 1Q7 3-State Outputs 13, 14, 16, 17, 19, 20, 22, 23 2Q0 to 2Q7 3-State Outputs 24 2OE 3 State Output Enable Input (Active LOW) 25 2LE Latch Enable Input 36, 35, 33, 32, 30, 29, 27, 26 2D0 to 2D7 Data Inputs 47, 46, 44, 43, 41, 40, 38, 37 1D0 to 1D7 Data Inputs 48 1LE Latch Enable Input 4, 10, 15, 21, 28, 34, 39, 45 GND Ground (0V) 7, 18, 31, 42 V CC Positive Supply Voltage INPUTS OUTPUT OE LE D Q HXX Z L L X NO CHANGE * LHL L LHH H

This logic diagram has not to be used to estimate propagation delays ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) IO absolute maximum rating must be observed 2) VO <G N D ,VO >V CC RECOMMENDED OPERATING CONDITIONS 1) VIN from 0.8V to 2V at VCC =3 . 0 V Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +4.6 V VI DC Input Voltage -0.5 to +4.6 V V O DC Output Voltage (OFF State) -0.5 to +4.6 V V O DC Output Voltage (High or Low State) (note 1) -0.5 to V CC + 0.5 V IIK DC Input Diode Current -5 0 m A IOK DC Output Diode Current (note 2) -5 0 m A IO DC Output Current ± 50 mA ICC or IGND DC V CC or Ground Current per Supply Pin ± 100 mA P D Power Dissipation 400 mW Tstg Storage Temperature -65 to +150 °C TL Lead Temperature (10 sec) 300 °C Symbol Parameter Value Unit VCC Supply Voltage 1.8 to 3.6 V VI Input Voltage -0.3 to 3.6 V VO Output Voltage (OFF State) 0 to 3.6 V V O Output Voltage (High or Low State) 0 to V CC V IOH ,IOL High or Low Level Output Current (VCC = 3.0 to 3.6V) ± 24 mA IOH ,IOL High or Low Level Output Current (VCC = 2.3 to 2.7V) ± 18 mA IOH ,IOL High or Low Level Output Current (VCC = 1.8V) ± 6m A Top Operating Temperature -55 to 125 °C dt/dv Input Rise and Fall Time (note 1) 0 to 10 ns/V

DC SPECIFICATIONS (2.7V < VCC < 3.6V unless otherwise specified) Symbol Parameter Test Condition Value UnitVCC (V) - 4 0t o8 5° C - 5 5t o1 2 5° C Min. Max. Min. Max. VIH High Level Input Voltage 2 . 7t o3 . 6 2.0 2.0 VVIL Low Level Input Voltage 0.8 0.8 VOH High Level Output Voltage 2 . 7t o3 . 6IO =-100µAV CC -0.2 V CC -0.2 V 2.7 IO =-12 mA 2.2 2.2 3.0 IO =-18 mA 2.4 2.4 IO =-24 mA 2.2 2.2 VOL Low Level Output Voltage 2 . 7t o3 . 6IO =100 µA 0.2 0.2 V 2.7 IO =12 mA 0.4 0.4 3.0 IO =18 mA 0.4 0.4 IO =24 mA 0.55 0.55 II Input Leakage Current 2 . 7t o3 . 6VI= 0 to 3.6V ± 5 ± 5 µA Ioff Power Off Leakage Current 0 VIor VO = 0 to 3.6V 10 10 µA IOZ High Impedance Output Leakage Current 2 . 7t o3 . 6V I=V IH or VIL VO = 0 to 3.6V ± 10 ± 10 µA ICC Quiescent Supply Current 2 . 7t o3 . 6 VI=V CC or GND 20 20 µAVIor VO =V CC to 3.6V ± 20 ± 20 ΔICC ICC incr. per Input2 . 7t o3 . 6VIH =V CC -0 . 6 V 750 750 µA

DC SPECIFICATIONS (2.3V < VCC < 2.7V unless otherwise specified) DC SPECIFICATIONS (1.8V <VCC < 2.3V unless otherwise specified) Symbol Parameter Test Condition Value UnitVCC (V) - 4 0t o8 5° C - 5 5t o1 2 5° C Min. Max. Min. Max. VIH High Level Input Voltage 2 . 3t o2 . 7 1.6 1.6 VVIL Low Level Input Voltage 0.7 0.7 VOH High Level Output Voltage 2 . 3t o2 . 7IO =-100µAV CC -0.2 V CC -0.2 V 2.3 IO =-6 mA 2.0 2.0 IO =-12 mA 1.8 1.8 IO =-18 mA 1.7 1.7 VOL Low Level Output Voltage 2 . 3t o2 . 7IO =100 µA 0.2 0.2 V 2.3 IO =12 mA 0.4 0.4 IO =18 mA 0.6 0.6 II Input Leakage Current 2 . 3t o2 . 7VI= 0 to 3.6V ± 5 ± 5 µA Ioff Power Off Leakage Current 0 VIor VO = 0 to 3.6V 10 10 µA IOZ High Impedance Output Leakage Current 2 . 3t o2 . 7V I=V IH or VIL VO = 0 to 3.6V ± 10 ± 10 µA ICC Quiescent Supply Current 2 . 3t o2 . 7 VI=V CC or GND 20 20 µAVIor VO =V CC to 3.6V ± 20 ± 20 Symbol Parameter Test Condition Value UnitVCC (V) - 4 0t o8 5° C - 5 5t o1 2 5° C Min. Max. Min. Max. VIH High Level Input Voltage 1 . 8t o2 . 3 0.7 VCC 0.7 VCC V VIL Low Level Input Voltage 0.2 VCC 0.2 VCC V VOH High Level Output Voltage 1.8 IO =-100µAV CC -0.2 V CC -0.2 VIO =-6 mA 1.4 1.4 VOL Low Level Output Voltage 1.8 IO =100 µA 0.2 0.2 VIO =6 mA 0.3 0.3 II Input Leakage Current 1.8 VI= 0 to 3.6V ± 5 ± 5 µA Ioff Power Off Leakage Current 0 VIor VO = 0 to 3.6V 10 10 µA IOZ High Impedance Output Leakage Current

1.8 VI=V IH or VIL

VO = 0 to 3.6V ± 10 ± 10 µA ICC Quiescent Supply Current 1.8 VI=V CC or GND 20 20 µAVIor VO =V CC to 3.6V ± 20 ± 20

DYNAMIC SWITCHING CHARACTERISTICS (Ta = 25°C, Input tr =tf= 2.0ns, CL = 30pF, RL = 500Ω) 1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the LOW state. 2) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the HIGH state. 3) Parameters guaranteed by design. AC ELECTRICAL CHARACTERISTICS (CL = 30pF, RL = 500Ω, Input tr =tf= 2.0ns) 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch- ing in the same direction, either HIGH or LOW (tOSLH =|tPLHm -tPLHn |, tOSHL =|tPHLm -tPHLn |) 2) Parameter guaranteed by design Symbol Parameter Test Condition Value UnitVCC (V) TA =2 5° C Min. Typ. Max. VOLP Dynamic Low Voltage Quiet Output (note 1, 3)

1.8 VIL=0 V

VIH =V CC 0.25 V2.5 0.6 3.3 0.8 VOLV Dynamic Low Voltage Quiet Output (note 1, 3) VIH =V CC -0.25 V2.5 -0.6 3.3 -0.8 V OHV Dynamic High Voltage Quiet Output (note 2, 3) VIH =V CC 1.5 V2.5 1.9 3.3 2.2 Symbol Parameter Test Condition Value UnitVCC (V) -40 to 85 °C -55 to 125 °C Min. Max. Min. Max. tPLH tPHL Propagation Delay Time Dn to Qn tPLH tPHL Propagation Delay Time LE to Qn ts Setup TIme, HIGH or LOW level Dn to LE 1.8 2.5 2.5 ns2.3 to 2.7 1.5 1.5 3.0 to 3.6 1.5 1.5 th Hold Time High or LOW level Dn to LE 1.8 1.0 1.0 ns2.3 to 2.7 1.0 1.0 3.0 to 3.6 1.0 1.0 tw LE Pulse Width, HIGH 1.8 4.0 4.0 ns2.3 to 2.7 1.5 1.5 3.0 to 3.6 1.5 1.5 tOSLH tOSHL Output To Output Skew Time (note1, 2) 1.8 0.75 0.75 ns2.3 to 2.7 0.5 0.5 3.0 to 3.6 0.5 0.5

CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr)=C PD xV CC xfIN +ICC /16 (per circuit) TEST CIRCUIT C L = 30 pF or equivalent (includes jig and probe capacitance) R L =R 1=5 0 0Ω or equivalent R T =Z OUT of pulse generator (typically 50Ω ) WAVEFORM SYMBOL VALUES Symbol Parameter Test Condition Value UnitVCC (V) TA =2 5° C Min. Typ. Max. C IN Input Capacitance 1.8, 2.5 or 3.3VIN = 0 or VCC 6p F C OUT Output Capacitance 1.8, 2.5 or 3.3VIN = 0 or VCC 7p F C PD Power Dissipation Capacitance (note 1) 1.8, 2.5 or 3.3 fIN = 10MHz VIN = 0 or VCC 20 pF TEST SWITCH tPLH ,tPHL Open tPZL ,tPLZ (VCC = 3.0 to 3.6V) 6V tPZL ,tPLZ (VCC = 2.3 to 2.7V or 1.8V) 2V CC tPZH ,tPHZ GND Symbol VCC VIH 2.7V VCC VCC VM 1.5V VCC /2 V CC /2 VX VOL + 0.3V V OL + 0.15V V OL + 0.15V VY VOH - 0.3V V OH - 0.15V V OH - 0.15V

WAVEFORM 1 : LE TO Qn PROPAGATION DELAYS, LE MINIMUM PULSE WIDTH, Dn TO LE SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle) WAVEFORM 2 : OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)

WAVEFORM 3 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)

DIM. mm. inch A 1.2 0.047 A1 0.05 0.15 0.002 0.006 A2 0.9 0.035 b 0.17 0.27 0.0067 0.011 c 0.09 0.20 0.0035 0.0079 D 12.4 12.6 0.488 0.496 E 8.1 BSC 0.318 BSC E1 6.0 6.2 0.236 0.244 e 0.5 BSC 0.0197 BSC K0 ˚ 8 ˚0 ˚ 8 ˚ L 0.50 0.75 0.020 0.030 TSSOP48 MECHANICAL DATA c Eb A2A D PIN 1 IDENTIFICATION A1 LKe 7065588C

DIM. mm. inch A 330 12.992 C 12.8 13.2 0.504 0.519 D 20.2 0.795 N 60 2.362 T 30.4 1.197 Ao 8.7 8.9 0.343 0.350 Bo 13.1 13.3 0.516 0.524 Ko 1.5 1.7 0.059 0.067 Po 3.9 4.1 0.153 0.161 P 11.9 12.1 0.468 0.476 Tape & Reel TSSOP48 MECHANICAL DATA

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