74VCX163245 ONSEMI | Alldatasheet
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74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs May 2007 ©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VCX163245 Rev. 1.7 74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
Features
Bidirectional interface between busses ranging from 1.65V to 3.6V Supports Live Insertion and Withdrawal (1) Static Drive (I OH OL – ±24mA @ 3.0V V CC – ±18mA @ 2.3V V CC – ±6mA @ 1.65V V CC circuitry Functionally compatible with 74 series 16245 Latchup performance exceeds 300mA ESD performance: – Human Body Model 2000V – Machine model 200V Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) Note: 1. To ensure the high impedance state during power up or power down, OE n should be tied to V CCB through a pull up resistor. The minimum value of the resistor is determined by the current sourcing capability of the driver. General Description The VCX163245 is a dual supply, 16-bit translating transceiver that is designed for 2 way asynchronous communication between busses at different supply volt- ages by providing true signal translation. The supply rails consist of V CCA , which is a higher potential rail operating at 2.3V to 3.6V and V CCB , which is the lower potential rail operating at 1.65V to 2.7V. (V CCB must be less than or equal to V CCA for proper device operation). This dual supply design allows for translation from 1.8V to 2.5V busses to busses at a higher potential, up to 3.3V. The Transmit/Receive (T/R ) input determines the direc- tion of data flow. Transmit (active-HIGH) enables data from A Ports to B Ports; Receive (active-LOW) enables data from B Ports to A Ports. The Output Enable (OE input, when HIGH, disables both A and B Ports by plac- ing them in a High-Z condition. The A Port interfaces with the higher voltage bus (2.7V to 3.3V); The B Port interfaces with the lower voltage bus (1.8V to 2.5V). Also the VCX163245 is designed so that the control pins (T/R n , OE n ) are supplied by V CCB The 74VCX163245 is suitable for mixed voltage applica- tions such as notebook computers using a 1.8V CPU and 3.3V peripheral components. It is fabricated with an Advanced CMOS technology to achieve high speed oper- ation while maintaining low CMOS power dissipation.
Ordering Information
Notes: 2. Ordering code “G” indicates Trays. 3. Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Order Number Package Number Package Description 74VCX163245G (2)(3) BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide 74VCX163245MTD (3) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Quiet Series™ is a trademark of Fairchild Semiconductor Corporation. Uses proprietary Quiet Series™ noise/EMI reduction
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs ©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VCX163245 Rev. 1.7 2 Connection Diagram Pin Assignment for TSSOP Pin Assignment for FBGA (Top Thru View) FBGA Pin Assignments Pin Descriptions Logic Diagram 123456 A B NC T/R OE NC A B B B NC NC A A C B B V CCB V CCA A A D B B GND GND A A E B B GND GND A A F B B GND GND A A G B B V CCB V CCA A A H B B NC NC A A J B NC T/R OE NC A Pin Names
Description
n Output Enable Input (Active LOW) T/R n Transmit/Receive Input A Side A Inputs or 3-STATE Outputs B Side B Inputs or 3-STATE Outputs NC No Connect
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs ©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VCX163245 Rev. 1.7 3 Truth Tables H HIGH Voltage Level L LOW Voltage Level X Immaterial (HIGH or LOW, inputs may not float) Z High Impedance VCX163245 Translator Power Up Sequence Recommendations To guard against power up problems, some simple guidelines need to be adhered to. The VCX163245 is designed so that the control pins (T/R n , OE n ) are sup- plied by V CCB . Therefore the first recommendation is to begin by powering up the control side of the device, V CCB . The OE n control pins should be ramped with or ahead of V CCB , this will guard against bus contentions and oscillations as all A Port and B Port outputs will be disabled. To ensure the high impedance state during power up or power down, OE n should be tied to V CCB through a pull up resistor. The minimum value of the resistor is determined by the current sourcing capability of the driver. Second, the T/R n control pins should be placed at logic LOW (0V) level, this will ensure that the B-side bus pins are configured as inputs to help guard against bus contention and oscillations. B-side Data Inputs should be driven to a valid logic level (0V or V CCB ), this will prevent excessive current draw and oscil- lations. V CCA can then be powered up after V CCB , how- ever V CCA must be greater than or equal to V CCB to ensure proper device operation. Upon completion of these steps the device can then be configured for the users desired operation. Following these steps will help to prevent possible damage to the translator device as well as other system components. Logic Diagrams Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. Inputs OutputsOE T/R LL Bus B Data to Bus A LH Bus A Data to Bus B HX HIGH Z State on A , B Inputs OutputsOE T/R LL Bus B Data to Bus A LH Bus A8–A 15 Data to Bus B8–B 15 HX HIGH-Z State on A8–A 15, B8–B 15
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs ©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VCX163245 Rev. 1.7 4 Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Recommended Operating Conditions(5) The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Notes: 4. IO Absolute Maximum Rating must be observed. 5. Unused inputs or I/O pins must be held HIGH or LOW. They may not float. 6. Operation requires: VCCB ≤ VCCA Symbol Parameter Rating VCCA Supply Voltage –0.5V to +4.6V VCCB –0.5V to V CCA VI DC Input Voltage –0.5V to +4.6V VI/O DC Output Voltage Outputs 3-STATE –0.5V to +4.6V An Output Active(4) –0.5V to V CCA + 0.5V Bn Output Active(4) –0.5V to V CCB + 0.5V IIK DC Input Diode Current, VI < 0V –50mA IOK DC Output Diode Current V O < 0V –50mA V O > VCC +50mA IOH/IOL DC Output Source/Sink Current ±50mA DC VCC or Ground Current ±100mA ICC or Ground Supply Pin TSTG Storage Temperature –65°C to +150°C Symbol Parameter Rating VCCA Power Supply(6) 2.3V to 3.6V VCCB 1.65V to 2.7V VI Input Voltage () @ OE , T/R 0V to VCCB VI/O Input/Output Voltage () An Bn 0V to VCCA 0V to VCCB IOH/IOL Output Current in IOH/IOL VCCA = 3.0V to 3.6V ±24mA VCCA = 2.3V to 2.7V ±18mA VCCB = 2.3V to 2.7V ±18mA VCCB = 1.65V to 1.95V ±6mA TA Free Air Operating Temperature –40°C to +85°C ∆ t/ ∆ V Minimum Input Edge Rate, V IN = 0.8V to 2.0V, VCC = 3.0V 10ns/V
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs ©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VCX163245 Rev. 1.7 5 Symbol Parameter V CCB (V) V CCA (V) Conditions Min. Max. Units VIHA HIGH Level Input Voltage VIHB Bn, T/R VILA LOW Level Input Voltage VILB Bn, T/R 1.65 2.3–2.7 I OH = –18mA 1.7 1.65–1.95 2.3 I OH = –6mA 1.25 1.65 2.3–2.7 I OL = 18mA 0.6 1.65–1.95 2.3 I OL = 6mA 0.3 II Input Leakage Current @ OE, T/R OE = VCCB VI = VIH or VIL ±10 µA IOFF Power Off Leakage Current 0 0 0 ≤ (VI, VO) ≤ 3.6V 10 µA ICCA/ICCB Quiescent Supply Current, per supply, VCCA / VCCB 1.65–1.95 2.3–2.7 A n = VCCA or GND, Bn, OE , & T/R = VCCB or GND 20 µA VCCB ≤ Bn, OE, T/R ≤ 3.6V ±20 µA ∆ ICC Increase in ICC per Input, Bn, T/R, OE
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs ©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VCX163245 Rev. 1.7 6 Symbol Parameter V CCB (V) V CCA (V) Conditions Min. Max. Units VIHA HIGH Level Input Voltage VIHB Bn, T/R VILA LOW Level Input Voltage VILB Bn, T/R 1.65 3.0–3.6 I OH = –24mA 2.2 1.65–1.95 3.0 I OH = –6mA 1.25 1.65 3.0–3.6 I OL = 24mA 0.55 1.65–1.95 3.0 I OL = 6mA 0.3 II Input Leakage Current @ OE, T/R OE = VCCB, VI = VIH or VIL ±10 µA IOFF Power OFF Leakage Current 0 0 0 ≤ (VI, VO) ≤ 3.6V 10 µA ICCA/ICCB Quiescent Supply Current, per supply, VCCA/VCCB 1.65–1.95 3.0–3.6 A n = VCCA or GND, Bn, OE , & T/R = VCCB or GND 20 µA VCCB ≤ Bn, OE, T/R ≤ 3.6V ±20 µA ∆ ICC Increase in ICC per Input, Bn, T/R, OE,
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs ©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VCX163245 Rev. 1.7 7 Symbol Parameter V CCB (V) V CCA (V) Conditions Min. Max. Units VIHA HIGH Level Input Voltage VIHB Bn, T/R VILA LOW Level Input Voltage VILB Bn, T/R 2.3 3.0–3.6 I OH = –24mA 2.2 2.3–2.7 3.0 I OH = –18mA 1.7 2.3 3.0–3.6 I OL = 24mA 0.55 2.3–2.7 3.0 I OL = 18mA 0.6 II Input Leakage Current @ OE, T/R OE = VCCA, VI = VIH or VIL ±10 µA IOFF Power OFF Leakage Current 0 0 0 ≤ (VI, VO) ≤ 3.6V 10 µA ICCA/ICCB Quiescent Supply Current, per supply, VCCA/VCCB 2.3–2.7 3.0–3.6 A n = VCCA or GND, Bn, OE , & T/R = VCCB or GND 20 µA VCCB ≤ Bn, OE, T/R ≤ 3.6V ±20 µA ∆ ICC Increase in ICC per Input, Bn, T/R, OE
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs ©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VCX163245 Rev. 1.7 8 Note: 7. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tosHL) or LOW-to-HIGH (tosLH). Dynamic Switching Characteristics Symbol Parameter TA = –40°C to +85°C, C L = 30 pF, RL = 500Ω Units VCCB = 1.65V to 1.95V, VCCA = 2.3V to 2.7V VCCB = 1.65V to 1.95V, VCCA = 3.0V to 3.6V VCCB = 2.3V to 2.7V, VCCA = 3.0V to 3.6V tPHL, tPLH Propagation Delay, A to B tPHL, tPLH Propagation Delay, B to A tPZL, tPZH Output Enable Time, OE to B tPZL, tPZH Output Enable Time, OE to A tPLZ, tPHZ Output Disable Time, OE to B tPLZ, tPHZ Output Disable Time, OE to A tosHL, tosLH Output to Output Skew(7) 0.05 0.5 0.75 ns Symbol Parameter V CCB (V) V CCA (V) Conditions TA = +25°C Typical Units VOLP Quiet Output Dynamic Peak VOL, A to B 1.8 2.5 C L = 30 pF , VIH = VCC, VIL = 0V 0.25 V 1.8 3.3 0.25 2.5 3.3 0.6 VOLP Quiet Output Dynamic Peak VOL, B to A 1.8 2.5 C L = 30 pF , VIH = VCC, VIL = 0V 0.6 V 1.8 3.3 0.8 2.5 3.3 0.8 VOLV Quiet Output Dynamic Valley VOL, A to B 1.8 2.5 C L = 30 pF , VIH = VCC, VIL = 0V –0.25 V 1.8 3.3 –0.25 2.5 3.3 –0.6 VOLV Quiet Output Dynamic Valley VOL, B to A 1.8 2.5 C L = 30 pF , VIH = VCC, VIL = 0V –0.6 V 1.8 3.3 –0.8 2.5 3.3 –0.8 VOHV Quiet Output Dynamic Valley VOH, A to B 1.8 2.5 C L = 30 pF , VIH = VCC, VIL = 0V 1.3 V 1.8 3.3 1.3 2.5 3.3 1.7 VOHV Quiet Output Dynamic Valley VOH, B to A 1.8 2.5 C L = 30 pF , VIH = VCC, VIL = 0V 1.7 V 1.8 3.3 2.0 2.5 3.3 2.0
Dimensions are in millimeters unless otherwise noted. Figure 5. 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Dimensions are in millimeters unless otherwise noted. Figure 6. 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs ©2000 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VCX163245 Rev. 1.7 12 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx Across the board. Around the world.™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT™ CTL™ Current Transfer Logic™ DOME™ E CMOS™ EcoSPARK EnSigna™ FACT Quiet Series™ FACT FAST FASTr™ FPS™ FRFET GlobalOptoisolator™ GTO™ HiSeC™ i-Lo™ ImpliedDisconnect™ IntelliMAX™ ISOPLANAR™ MICROCOUPLER™ MicroPak™ MICROWIRE™ Motion-SPM™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC OPTOPLANAR PACMAN™ PDP-SPM™ POP™ Power220 Power247 PowerEdge™ PowerSaver™ Power-SPM™ PowerTrench Programmable Active Droop™ QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ ScalarPump™ SMART START™ SPM STEALTH™ SuperFET™ SuperSOT™ -3 SuperSOT™ -6 SuperSOT™ -8 SyncFET™ TCM™ The Power Franchise TinyBoost™ TinyBuck™ TinyLogic TINYOPTO™ TinyPower™ TinyWire™ TruTranslation™ µSerDes™ UHC UniFET™ VCX™ Wire™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production First Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I26
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