74VCX163245 FAIRCHILD | Alldatasheet

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I Bidirectional interface between busses ranging from 1.65V to 3.6V I Supports Live Insertion and Withdrawal (Note 1) I Static Drive (IOH /IOL ) /c114 24 mA @ 3.0V VCC /c114 18 mA @ 2.3V VCC /c114 6 mA @ 1.65V VCC I Uses patented Quiet Series/c165 noise/EMI reduction circuitry I Functionally compatible with 74 series 16245 I Latchup performance exceeds 300 mA I ESD performance: Human Body Model /c33 2000V Machine model /c33 200V I Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) Note 1: To ensure the high impedance state during power up or power down, OEn should be tied to VCCB through a pull up resistor. The minimum value of the resistor is determined by the current sourcing capability of the driver. Ordering Code: Note 2: Ordering code “G” indicates Trays. Note 3: Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Diagram Quiet Series/c165 is a trademark of Fairchild Semiconductor Corporation. Order Number Package Number Package Description 74VCX163245G (Note 2)(Note 3) BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide 74VCX163245MTD (Note 3) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

www.fairchildsemi.com 2 74VCX163245 Connection Diagrams Pin Assignment for TSSOP Pin Assignment for FBGA (Top Thru View) Pin Descriptions FBGA Pin Assignments Truth Tables H /c32 HIGH Voltage Level L /c32 LOW Voltage Level X /c32 Immaterial (HIGH or LOW, inputs may not float) Z /c32 High Impedance Pin Names Description OE n Output Enable Input (Active LOW) T/Rn Transmit/Receive Input A0–A15 Side A Inputs or 3-STATE Outputs B0–B15 Side B Inputs or 3-STATE Outputs NC No Connect 123 456 A B0 NC T/R 1 OE 1 NC A 0 B B2 B1 NC NC A 1 A2 C B4 B3 VCCB VCCA A3 A4 D B6 B5 GND GND A 5 A6 E B8 B7 GND GND A 7 A8 F B10 B9 GND GND A 9 A10 G B12 B11 VCCB VCCA A11 A12 H B14 B13 NC NC A 13 A14 J B15 NC T/R 2 OE 2 NC A 15 Inputs Outputs OE 1 T/R1 L L Bus B 0–B7 Data to Bus A0–A7 L H Bus A 0–A7 Data to Bus B0–B7 H X HIGH Z State on A 0–A7, B0–B7 Inputs Outputs OE 2 T/R2 L L Bus B 8–B15 Data to Bus A8–A15 L H Bus A 8–A15 Data to Bus B8–B15 H X HIGH-Z State on A 8–A15, B8–B15

3 www.fairchildsemi.com 74VCX163245 VCX163245 Translator Power Up Sequence Recommendations To guard against power up problems, some simple guide- lines need to be adhered to. The VCX163245 is designed so that the control pins (T/R n, OEn) are supplied by VCCB . Therefore the first recommendation is to begin by powering up the control side of the device, VCCB . The OEn control pins should be ramped with or ahead of VCCB , this will guard against bus contentions and oscillations as all A Port and B Port outputs will be disabled. To ensure the high impedance state during power up or power down, OE n should be tied to VCCB through a pull up resistor. The mini- mum value of the resistor is determined by the current sourcing capability of the driver. Second, the T/Rn control pins should be placed at logic LOW (0V) level, this will ensure that the B-side bus pins are configured as inputs to help guard against bus contention and oscillations. B-side Data Inputs should be driven to a valid logic level (0V or V CCB ), this will prevent excessive current draw and oscilla- tions. VCCA can then be powered up after VCCB , however VCCA must be greater than or equal to VCCB to ensure proper device operation. Upon completion of these steps the device can then be configured for the users desired operation. Following these steps will help to prevent possi- ble damage to the translator device as well as other system components. Logic Diagrams Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.

www.fairchildsemi.com 4 74VCX163245 Absolute Maximum Ratings(Note 4) Recommended Operating Conditions (Note 6) Note 4: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 5: I O Absolute Maximum Rating must be observed. Note 6: Unused inputs or I/O pins must be held HIGH or LOW. They may not float. Note 7: Operation requires: VCCB /c100 VCCA Supply Voltage VCCA /c16 0.5V to /c14 4.6V VCCB /c16 0.5V to VCCA DC Input Voltage (VI) /c16 0.5V to /c14 4.6V DC Output Voltage (VI/O) Outputs 3-STATE /c16 0.5V to /c14 4.6V Outputs Active (Note 5) An /c16 0.5V to VCCA /c14 0.5V Bn /c16 0.5V to VCCB /c14 0.5V DC Input Diode Current (IIK) VI /c31 0V /c16 50 mA DC Output Diode Current (IOK ) V O /c31 0V /c16 50 mA V O /c33 VCC /c14 50 mA DC Output Source/Sink Current (IOH /IOL ) /c114 50 mA DC V CC or Ground Current /c114 100 mA Supply Pin (ICC or Ground) Storage Temperature (TSTG ) /c16 65/c113 C to /c14 150/c113 C Power Supply (Note 7) VCCA 2.3V to 3.6V VCCB 1.65V to 2.7V Input Voltage (VI) @ OE, T/R 0V to VCCB Input/Output Voltage (VI/O) An 0V to VCCA Bn 0V to VCCB Output Current in IOH /IOL VCCA /c32 3.0V to 3.6V /c114 24 mA VCCA /c32 2.3V to 2.7V /c114 18 mA VCCB /c32 2.3V to 2.7V /c114 18 mA VCCB /c32 1.65V to 1.95V /c114 6 mA Free Air Operating Temperature (TA /c16 40/c113 C to /c14 85/c113 C Minimum Input Edge Rate (/c39 t//c39 V) V IN /c32 0.8V to 2.0V, VCC /c32 3.0V 10 ns/V Symbol Parameter Conditions VCCB VCCA Min Max Units (V) (V) V IOH /c32 /c16 18 mA 1.65 2.3 –2.7 1.7 V IOH /c32 /c16 6 mA 1.65 –1.95 2.3 1.25 V IOL /c32 18 mA 1.65 2.3 –2.7 0.6 V IOL /c32 6 mA 1.65 –1.95 2.3 0.3 IOZ 3-STATE Output Leakage 0V /c100 VO /c100 3.6V 1.65–1.95 2.3–2.7 /c114 10 /c80 AOE /c32 VCCB VI /c32 VIH or VIL IOFF Power Off Leakage Current 0 /c100 (VI, VO ) /c100 3.6V 0 0 10 /c80 A ICCA /ICCB Quiescent Supply Current, A n /c32 VCCA or GND per supply, VCCA / VCCB Bn, OE, & T/R /c32 VCCB or GND VCCA /c100 An /c100 3.6V 1.65–1.95 2.3–2.7 /c114 20 /c80 A VCCB /c100 Bn, OE, T/R /c100 3.6V

5 www.fairchildsemi.com 74VCX163245 Symbol Parameter Conditions VCCB VCCA Min Max Units (V) (V) V IOH /c32 /c16 24 mA 1.65 3.0 –3.6 2.2 V IOH /c32 /c16 6 mA 1.65 –1.95 3.0 1.25 V IOL /c32 24 mA 1.65 3.0 –3.6 0.55 V IOL /c32 6 mA 1.65 –1.95 3.0 0.3 IOZ 3-STATE Output Leakage 0V /c100 VO /c100 3.6V 1.65–1.95 3.0–3.6 /c114 10 /c80 AOE* /c32 VCCB VI /c32 VIH or VIL IOFF Power OFF Leakage Current 0 /c100 (VI, VO ) /c100 3.6V 0 0 10 /c80 A ICCA /ICCB Quiescent Supply Current, A n /c32 VCCA or GND per supply, VCCA /VCCB Bn, OE, & T/R /c32 VCCB or GND VCCA /c100 An /c100 3.6V 1.65–1.95 3.0–3.6 /c114 20 /c80 A VCCB /c100 Bn, OE, T/R /c100 3.6V Symbol Parameter Conditions VCCB VCCA Min Max Units (V) (V) V IOH /c32 /c16 24 mA 2.3 3.0 –3.6 2.2 V IOH /c32 /c16 18 mA 2.3 –2.7 3.0 1.7 V IOL /c32 24 mA 2.3 3.0 –3.6 0.55 V IOL /c32 18 mA 2.3 –2.7 3.0 0.6 IOZ 3-STATE Output Leakage @ An 0V /c100 VO /c100 3.6V 2.3–2.7 3.0 –3.6 /c114 10 /c80 AOE /c32 VCCA VI /c32 VIH or VIL IOFF Power OFF Leakage Current 0 /c100 (VI, VO ) /c100 3.6V 0 0 10 /c80 A ICCA /ICCB Quiescent Supply Current, A n /c32 VCCA or GND per supply, VCCA /VCCB Bn, OE, & T/R /c32 VCCB or GND VCCA /c100 An /c100 3.6V 2.3–2.7 3.0 –3.6 /c114 20 /c80 A VCCB /c100 Bn, OE, T/R /c100 3.6V

www.fairchildsemi.com 6 74VCX163245 Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tosHL ) or LOW-to-HIGH (tosLH). Dynamic Switching Characteristics Capacitance Symbol Parameter TA /c32 /c16 40/c113 C to /c14 85/c113 C, CL /c32 30 pF, RL /c32 500/c58 Units Min Max Min Max Min Max tosHL Output to Output Skew 5.0 0.5 0.75 ns tosLH (Note 8) Symbol Parameter Conditions VCCB VCCA TA /c32 /c14 25/c113 C Units (V) (V) Typical VOLP Quiet Output Dynamic C L /c32 30 pF, VIH /c32 VCC , VIL /c32 0V 1.8 2.5 0.25 VPeak VOL , A to B 1.8 3.3 0.25 2.5 3.3 0.6 VOLP Quiet Output Dynamic C L /c32 30 pF, VIH /c32 VCC , VIL /c32 0V 1.8 2.5 0.6 VPeak VOL , B to A 1.8 3.3 0.8 2.5 3.3 0.8 VOLV Quiet Output Dynamic C L /c32 30 pF, VIH /c32 VCC , VIL /c32 0V 1.8 2.5 /c16 0.25 VValley VOL , A to B 1.8 3.3 /c16 0.25 2.5 3.3 /c16 0.6 VOLV Quiet Output Dynamic C L /c32 30 pF, VIH /c32 VCC , VIL /c32 0V 1.8 2.5 /c16 0.6 VValley VOL , B to A 1.8 3.3 /c16 0.8 2.5 3.3 /c16 0.8 VOHV Quiet Output Dynamic C L /c32 30 pF, VIH /c32 VCC , VIL /c32 0V 1.8 2.5 1.3 VValley VOH , A to B 1.8 3.3 1.3 2.5 3.3 1.7 VOHV Quiet Output Dynamic C L /c32 30 pF, VIH /c32 VCC , VIL /c32 0V 1.8 2.5 1.7 VValley VOH , B to A 1.8 3.3 2.0 2.5 3.3 2.0 Symbol Parameter Conditions TA /c32 /c14 25/c113 C Units C IN Input Capacitance V CCB /c32 2.5V, VCCA /c32 3.3V, VI /c32 0V or VCCA/B 5p F C I/O Input/Output Capacitance V CCB /c32 2.5V, VCCA /c32 3.3V, VI /c32 0V or VCCA/B 6p F C PD Power Dissipation Capacitance V CCB /c32 2.5V, VCCA /c32 3.3V, VI /c32 0V or VCCA/B 20 pF f /c32 10MHz

8 www.fairchildsemi.com 74VCX163245 Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

9 www.fairchildsemi.com 74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com