74LV126A

SN74LV126A_07 TI | Alldatasheet

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/C0083/C0078/C0053/C0052/C0076/C0086/C0049/C0050/C0054/C0065/C0044 /C0083/C0078/C0055/C0052/C0076/C0086/C0049/C0050/C0054/C0065 /C0081/C0085/C0065/C0068/C0082/C0085/C0080/C0076/C0069 /C0066/C0085/C0083 /C0066/C0085/C0070/C0070/C0069/C0082 /C0071/C0065/C0084/C0069/C0083 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCES131H − MARCH 1998 − REVISED APRIL 2005 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C00682-V to 5.5-V VCC Operation /C0068Max tpd of 6.5 ns at 5 V /C0068Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C /C0068Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C /C0068Support Mixed-Mode Voltage Operation on All Ports /C0068Latch-Up Performance Exceeds 250 mA Per JESD 17 /C0068ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) description/ordering information These quadruple bus buffer gates are designed for 2-V to 5.5-V V CC operation. The ’LV126A devices feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

ORDERING INFORMATION

TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC − D Tube of 50 SN74LV126AD LV126ASOIC − D Reel of 2500 SN74LV126ADR LV126A SOP − NS Reel of 2000 SN74LV126ANSR 74LV126A −40°C to 85°C SSOP − DB Reel of 2000 SN74LV126ADBR LV126A −40°C to 85°C Tube of 90 SN74LV126APW TSSOP − PW Reel of 2000 SN74LV126APWR LV126ATSSOP − PW Reel of 250 SN74LV126APWT LV126A TVSOP − DGV Reel of 2000 SN74LV126ADGVR LV126A CDIP − J Tube of 25 SNJ54LV126AJ SNJ54LV126AJ −55°C to 125°C CFP − W Tube of 150 SNJ54LV126AW SNJ54LV126AW−55 C to 125C LCCC − FK Tube of 55 SNJ54LV126AFK SNJ54LV126AFK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright  2005, Texas Instruments Incorporated/C0085/C0078/C0076/C0069/C0083/C0083 /C0079/C0084/C0072/C0069/C0082/C0087/C0073/C0083/C0069 /C0078/C0079/C0084/C0069/C0068 /C0116/C0104/C0105/C0115 /C0100/C0111/C0099/C0117/C0109/C0101/C0110/C0116 /C0099/C0111/C0110/C0116/C0097/C0105/C0110/C0115 /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 1OE 2OE GND V CC 4OE 3OE SN54LV126A ...J O R W PACKAGE SN74LV126A ...D , D B , D G V , NS, OR PW PACKAGE (TOP VIEW) 321 2 0 1 9 91 01 11 21 3 NC NC 3OE NC 2OE NC 1OE NC V 4OE GND NC SN54LV126A . . . FK PACKAGE (TOP VIEW) CC NC − No internal connection Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

/C0083/C0078/C0053/C0052/C0076/C0086/C0049/C0050/C0054/C0065/C0044 /C0083/C0078/C0055/C0052/C0076/C0086/C0049/C0050/C0054/C0065 /C0081/C0085/C0065/C0068/C0082/C0085/C0080/C0076/C0069 /C0066/C0085/C0083 /C0066/C0085/C0070/C0070/C0069/C0082 /C0071/C0065/C0084/C0069/C0083 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCES131H − MARCH 1998 − REVISED APRIL 2005

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

(each buffer) INPUTS OUTPUT OE A OUTPUT Y H H H H LL L X Z logic diagram (positive logic) 11OE 21A 1Y 3 42OE 52A 2Y 6 103OE 93A 3Y 8 134OE 124A 4Y 11 Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Voltage range applied to any output in the high-impedance † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7.

/C0083/C0078/C0053/C0052/C0076/C0086/C0049/C0050/C0054/C0065/C0044 /C0083/C0078/C0055/C0052/C0076/C0086/C0049/C0050/C0054/C0065 /C0081/C0085/C0065/C0068/C0082/C0085/C0080/C0076/C0069 /C0066/C0085/C0083 /C0066/C0085/C0070/C0070/C0069/C0082 /C0071/C0065/C0084/C0069/C0083 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCES131H − MARCH 1998 − REVISED APRIL 2005 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (see Note 4) SN54LV126A SN74LV126A UNITMIN MAX MIN MAX UNIT VCC Supply voltage 2 5.5 2 5.5 V VCC = 2 V 1.5 1.5 VIH High-level input voltage VCC = 2.3 V to 2.7 V VCC × 0.7 VCC × 0.7 VVIH High-level input voltage VCC = 3 V to 3.6 V VCC × 0.7 VCC × 0.7 V VCC = 4.5 V to 5.5 V VCC × 0.7 VCC × 0.7 VCC = 2 V 0.5 0.5 VIL Low-level input voltage VCC = 2.3 V to 2.7 V VCC × 0.3 VCC × 0.3 VVIL Low-level input voltage VCC = 3 V to 3.6 V VCC × 0.3 VCC × 0.3 V VCC = 4.5 V to 5.5 V VCC × 0.3 VCC × 0.3 VI Input voltage 0 5.5 0 5.5 V VO Output voltage High or low state 0 VCC 0 VCC VVO Output voltage 3-state 0 5.5 0 5.5 V VCC = 2 V −50 −50 µA IOH High-level output current VCC = 2.3 V to 2.7 V −2 −2 IOH High-level output current VCC = 3 V to 3.6 V −8 −8 mA VCC = 4.5 V to 5.5 V −16 −16 mA VCC = 2 V 50 50 µA IOL Low-level output current VCC = 2.3 V to 2.7 V 2 2 IOL Low-level output current VCC = 3 V to 3.6 V 8 8 mA VCC = 4.5 V to 5.5 V 16 16 mA VCC = 2.3 V to 2.7 V 200 200 ∆t/∆v Input transition rise or fall rateVCC = 3 V to 3.6 V 100 100 ns/V∆t/∆v Input transition rise or fall rate VCC = 4.5 V to 5.5 V 20 20 ns/V TA Operating free-air temperature −55 125 −40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC SN54LV126A SN74LV126A UNITPARAMETER TEST CONDITIONS VCC MIN TYP MAX MIN TYP MAX UNIT IOH = −50 µA 2 V to 5.5 VVCC −0.1 VCC −0.1 VOH IOH = −2 mA 2.3 V 2 2 VVOH IOH = −8 mA 3 V 2.48 2.48 V IOH = −16 mA 4.5 V 3.8 3.8 IOL = 50 µA 2 V to 5.5 V 0.1 0.1 VOL IOL = 2 mA 2.3 V 0.4 0.4 VVOL IOL = 8 mA 3 V 0.44 0.44 V IOL = 16 mA 4.5 V 0.55 0.55 II VI = 5.5 V or GND 0 to 5.5 V ±1 ±1 µA IOZ VO = VCC or GND 5.5 V ±5 ±5 µA ICC VI = VCC or GND, IO = 0 5.5 V 20 20 µA Ioff VI or VO = 0 to 5.5 V 0 5 5 µA C i VI = VCC or GND 3.3 V 1.6 1.6 pF /C0080/C0082/C0079/C0068/C0085/C0067/C0084 /C0080/C0082/C0069/C0086/C0073/C0069/C0087 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0099/C0111/C0110/C0099/C0101/C0114/C0110/C0115 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0105/C0110 /C0116/C0104/C0101 /C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0118/C0101 /C0111/C0114 /C0100/C0101/C0115/C0105/C0103/C0110 /C0112/C0104/C0097/C0115/C0101 /C0111/C0102 /C0100/C0101/C0118/C0101/C0108/C0111/C0112/C0109/C0101/C0110/C0116/C0046 /C0067/C0104/C0097/C0114/C0097/C0099/C0116/C0101/C0114/C0105/C0115/C0116/C0105/C0099 /C0100/C0097/C0116/C0097 /C0097/C0110/C0100 /C0111/C0116/C0104/C0101/C0114 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0097/C0114/C0101 /C0100/C0101/C0115/C0105/C0103/C0110 /C0103/C0111/C0097/C0108/C0115/C0046 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0114/C0101/C0115/C0101/C0114/C0118/C0101/C0115 /C0116/C0104/C0101 /C0114/C0105/C0103/C0104/C0116 /C0116/C0111 /C0099/C0104/C0097/C0110/C0103/C0101 /C0111/C0114 /C0100/C0105/C0115/C0099/C0111/C0110/C0116/C0105/C0110/C0117/C0101 /C0116/C0104/C0101/C0115/C0101 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0119/C0105/C0116/C0104/C0111/C0117/C0116 /C0110/C0111/C0116/C0105/C0099/C0101/C0046

/C0083/C0078/C0053/C0052/C0076/C0086/C0049/C0050/C0054/C0065/C0044 /C0083/C0078/C0055/C0052/C0076/C0086/C0049/C0050/C0054/C0065 /C0081/C0085/C0065/C0068/C0082/C0085/C0080/C0076/C0069 /C0066/C0085/C0083 /C0066/C0085/C0070/C0070/C0069/C0082 /C0071/C0065/C0084/C0069/C0083 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCES131H − MARCH 1998 − REVISED APRIL 2005

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

switching characteristics over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO LOAD TA = 25°C SN54LV126A SN74LV126A UNITPARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE MIN TYP MAX MIN MAX MIN MAX UNIT tpd A Y 7.1* 13* 1* 15.5* 1 15.5 ten OE Y C L = 15 pF 7.4* 13* 1* 15.5* 1 15.5 ns tdis OE Y C L = 15 pF ns tpd A Y 9.2 16.5 1 18.5 1 18.5 ten OE Y C L = 50 pF 9.5 16.5 1 18.5 1 18.5 ns tdis OE Y C L = 50 pF 8.1 18.2 15 20.5 1 20.5 ns tsk(o) 2 2 * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO LOAD TA = 25°C SN54LV126A SN74LV126A UNITPARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE MIN TYP MAX MIN MAX MIN MAX UNIT tpd A Y 5* 8* 1* 9.5* 1 9.5 ten OE Y C L = 15 pF 5.1* 8* 1* 9.5* 1 9.5 ns tdis OE Y C L = 15 pF ns tpd A Y 6.4 11.5 1 13 1 13 ten OE Y C L = 50 pF 6.6 11.5 1 13 1 13 ns tdis OE Y C L = 50 pF 6.1 13.2 1 15 1 15 ns tsk(o) 1.5 1.5 * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO LOAD TA = 25°C SN54LV126A SN74LV126A UNITPARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE MIN TYP MAX MIN MAX MIN MAX UNIT ten OE Y C L = 15 pF 3.6* 5.1* 1* 6* 1 6 ns tdis OE Y C L = 15 pF ns tpd A Y 4.6 7.5 1 8.5 1 8.5 ten OE Y C L = 50 pF 4.6 7.1 1 8 1 8 ns tdis OE Y C L = 50 pF 4.3 8.8 1 10 1 10 ns tsk(o) 1 1 * On products compliant to MIL-PRF-38535, this parameter is not production tested. /C0080/C0082/C0079/C0068/C0085/C0067/C0084 /C0080/C0082/C0069/C0086/C0073/C0069/C0087 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0099/C0111/C0110/C0099/C0101/C0114/C0110/C0115 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0105/C0110 /C0116/C0104/C0101 /C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0118/C0101 /C0111/C0114 /C0100/C0101/C0115/C0105/C0103/C0110 /C0112/C0104/C0097/C0115/C0101 /C0111/C0102 /C0100/C0101/C0118/C0101/C0108/C0111/C0112/C0109/C0101/C0110/C0116/C0046 /C0067/C0104/C0097/C0114/C0097/C0099/C0116/C0101/C0114/C0105/C0115/C0116/C0105/C0099 /C0100/C0097/C0116/C0097 /C0097/C0110/C0100 /C0111/C0116/C0104/C0101/C0114 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0097/C0114/C0101 /C0100/C0101/C0115/C0105/C0103/C0110 /C0103/C0111/C0097/C0108/C0115/C0046 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0114/C0101/C0115/C0101/C0114/C0118/C0101/C0115 /C0116/C0104/C0101 /C0114/C0105/C0103/C0104/C0116 /C0116/C0111 /C0099/C0104/C0097/C0110/C0103/C0101 /C0111/C0114 /C0100/C0105/C0115/C0099/C0111/C0110/C0116/C0105/C0110/C0117/C0101 /C0116/C0104/C0101/C0115/C0101 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0119/C0105/C0116/C0104/C0111/C0117/C0116 /C0110/C0111/C0116/C0105/C0099/C0101/C0046

/C0083/C0078/C0053/C0052/C0076/C0086/C0049/C0050/C0054/C0065/C0044 /C0083/C0078/C0055/C0052/C0076/C0086/C0049/C0050/C0054/C0065 /C0081/C0085/C0065/C0068/C0082/C0085/C0080/C0076/C0069 /C0066/C0085/C0083 /C0066/C0085/C0070/C0070/C0069/C0082 /C0071/C0065/C0084/C0069/C0083 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCES131H − MARCH 1998 − REVISED APRIL 2005 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 noise characteristics, VCC = 3.3 V, CL = 50 pF, TA = 25°C (see Note 5) PARAMETER SN74LV126A UNITPARAMETER MIN TYP MAX UNIT VOL(P) Quiet output, maximum dynamic VOL 0.3 0.8 V VOL(V) Quiet output, minimum dynamic VOL −0.2 −0.8 V VOH(V) Quiet output, minimum dynamic VOH 3.1 V VIH(D) High-level dynamic input voltage 2.31 V VIL(D) Low-level dynamic input voltage 0.97 V NOTE 5: Characteristics are for surface-mount packages only. operating characteristics, TA = 25°C PARAMETER TEST CONDITIONS VCC TYP UNIT C pd Power dissipation capacitance Outputs enabled C L = 50 pF, f = 10 MHz 3.3 V 14.4 pFC pd Power dissipation capacitance Outputs enabled C L = 50 pF, f = 10 MHz 5 V 15.9 pF

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

NOTES: A. C L includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time, with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPHL and tPLH are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) SN74LV126AD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ADBR ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ADBRE4 ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ADBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ADE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ADG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ADGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ADGVRE4 ACTIVE TVSOP DGV 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ADGVRG4 ACTIVE TVSOP DGV 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ADR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ADRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ADRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ANSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ANSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126ANSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126APW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126APWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126APWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126APWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126APWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126APWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126APWT ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126APWTE4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV126APWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1)The marketing status values are defined as follows: PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 Addendum-Page 1

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 19-May-2007 Pack Materials-Page 1

Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant SN74LV126ADBR DB 14 MLA 330 16 8.2 6.6 2.5 12 16 Q1 SN74LV126ADGVR DGV 14 MLA 330 12 6.8 4.0 1.6 8 16 Q1 SN74LV126ADR D 14 MLA 330 16 6.5 9.0 2.1 8 16 Q1 SN74LV126ANSR NS 14 MLA 330 16 8.2 10.5 2.5 12 16 Q1 SN74LV126APWR PW 14 MLA 330 12 7.0 5.6 1.6 8 12 Q1 TAPE AND REEL BOX INFORMATION Device Package Pins Site Length (mm) Width (mm) Height (mm) SN74LV126ADBR DB 14 MLA 342.9 336.6 28.58 SN74LV126ADGVR DGV 14 MLA 338.1 340.5 20.64 SN74LV126ADR D 14 MLA 342.9 336.6 28.58 SN74LV126ANSR NS 14 MLA 342.9 336.6 28.58 SN74LV126APWR PW 14 MLA 338.1 340.5 20.64 PACKAGE MATERIALS INFORMATION www.ti.com 19-May-2007 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 19-May-2007 Pack Materials-Page 3

MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE

24 PINS SHOWN

3,70 3,50 4,90 5,10 20DIM PINS ** 4073251/E 08/00 1,20 MAX Seating Plane 0,05 0,15 0,25 0,50 0,75 0,23 0,13 11 2 24 13 4,30 4,50 0,16 NOM Gage Plane A 7,90 7,70 382416 4,90 5,103,70 3,50 A MAX A MIN 6,60 6,20 11,20 11,40 9,60 9,80 0,08 M0,070,40 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 4040065 /E 12/01

28 PINS SHOWN

8,20 7,40 0,55 0,95 0,25 12,90 12,30 10,50 8,50 Seating Plane 9,907,90 10,50 9,90 0,38 5,60 5,00 0,22 A 2016 6,506,50 0,05 MIN 5,905,90 DIM A MAX A MIN PINS ** 2,00 MAX 6,90 7,50 0,65 M0,15 0°–/C02578° 0,10 0,09 0,25 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,65 M0,10 0,10 0,25 0,50 0,75 0,15 NOM Gage Plane 9,80 9,60 7,90 7,70 2016 6,60 6,40 4040064/F 01/97 0,30 6,60 6,20 0,19 4,30 4,50 0,15 A 1,20 MAX 5,10 4,90 3,10 2,90 A MAX A MIN DIM PINS ** 0,05 4,90 5,10 Seating Plane 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153

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