74LV123 NXP | Alldatasheet
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Technical content
- General description The 74LV123 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC123; 74HCT123. It is a dual retriggerable monostable multivibrator which uses three methods to control the output pulse width: 1. The basic pulse time is programmed by the selection of an external resistor (R EXT ) and capacitor (CEXT ). These are normally connected as shown inFigure9. 2. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as desired (seeFigure12). 3. Alternatively, an output delay can be terminated at any time by a LOW-going edge on input nRD, which also inhibits the triggering (seeFigure13). Schmitt-trigger action in the nA and nB inputs makes the circuit highly tolerant of slower input rise and fall times. 2. Features ■ Optimized for low-voltage applications: 1.0 V to 5.5 V ■ Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V ■ Typical output ground bounce: < 0.8 V at VCC = 3.3 V and Tamb = 25°C ■ Typical HIGH-level output voltage (VOH ) undershoot: > 2 V at VCC = 3.3 V and Tamb =2 5°C ■ DC triggered from active HIGH or active LOW inputs ■ Retriggerable for very long pulses up to 100 % duty factor ■ Direct reset terminates output pulses ■ Schmitt-trigger action on all inputs except for the reset input 74LV123 Dual retriggerable monostable multivibrator with reset Rev. 05 — 8 November 2007 Product data sheet
74LV123_5 © NXP B.V. 2007. All rights reserved. Table 1. Ordering information
74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 3 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset Fig 3. Functional diagram 1QQ 2RD R D S 13 1REXT/CEXT15 1CEXT14 1QQ 001aaa610 1RD 11A 102B T Q R D S 2REXT/CEXT7 2CEXT6 2Q5 Q 2Q12 T
74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 4 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset Fig 4. Logic diagram 001aae524 VCC nREXT/CEXT Q Q CL CL R CL CLCL VCC VCC RR RD R A B
74LV123_5 © NXP B.V. 2007. All rights reserved.
5.1 Pinning
5.2 Pin description
Table 2. Pin description
74LV123_5 © NXP B.V. 2007. All rights reserved. [2] If the monostable multivibrator was triggered before this condition was established, the pulse will continue as programmed. Table 3. Function table[1]
74LV123_5 © NXP B.V. 2007. All rights reserved. [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For DIP16 package: Ptot derates linearly with 12 mW/K above 70°C. [3] For SO16 package: Ptot derates linearly with 8 mW/K above 70°C. [4] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60°C. [5] For DHVQFN16 package: Ptot derates linearly with 4.5 mW/K above 60°C.
- Recommended operating conditions
[2] Except for Schmitt-trigger inputs nA and nB. Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Table 5. Recommended operating conditions
74LV123_5 © NXP B.V. 2007. All rights reserved. Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
74LV123_5 © NXP B.V. 2007. All rights reserved. [1] All typical values are measured at Tamb = 25°C. Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
74LV123_5 © NXP B.V. 2007. All rights reserved. Table 7. Dynamic characteristics GND = 0 V; tr =tf≤ 2.5 ns; for test circuit seeFigure8.
74LV123_5 © NXP B.V. 2007. All rights reserved. [1] All typical values are measured at Tamb = 25°C and nominal supply values (VCC = 3.3 V and 5.0 V). [2] tpd is the same as tPLH and tPHL ; CEXT = 0 pF; REXT =5 kΩ . [3] For other REXT and CEXT combinations seeFigure11 andSection 12.1.1 “Basic timing”. [5] C PD is used to determine the dynamic power dissipation (PD inµW). L × VCC 2 × fo) = sum of the outputs. Table 7. Dynamic characteristics …continued GND = 0 V; tr =tf≤ 2.5 ns; for test circuit seeFigure8.
74LV123_5 © NXP B.V. 2007. All rights reserved. Measurement points are given inTable8. Table 8. Measurement points Test data is given inTable9. C L = Load capacitance including jig and probe capacitance. R T = Termination resistance should be equal to Zo of the pulse generator.
74LV123_5 © NXP B.V. 2007. All rights reserved.
12.1 Timing components
12.1.1 Basic timing
Table 9. Test data
74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 14 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset
12.1.2 Retrigger timing
The time to retrigger the monostable multivibrator depends on the values of REXT and C EXT . The output pulse width will only be extended when the time between the active going edges of the trigger pulses meets the minimum retrigger time. If CEXT > 10 pF , the next formula for the set-up time of a retrigger pulse is valid: at VCC = 3.0 V: trtrig = 41 + 0.15REXT × CEXT 0.9× 1× REXT (typ.) where: trtrig = retrigger time in ns C EXT = external capacitor in pF R EXT = external resistor in kΩ C EXT = 10 nF; REXT = 10 kΩ to 100 kΩ VCC = 3.3 V and Tamb = 25°C Fig 10. Typical ‘K’ factor as a function of VCC Fig 11. Typical output pulse width as a function of the external capacitance values 001aae529 VCC (V) 06 42 0.4 0.2 0.6 0.8 'K' factor 001aae530 103 102 105 104 106 tW (ns) C ext (pF) 11 0 410310 10 2 R EXT = 100 kW 50 kW 10 kW 2 kW nRD = HIGH Fig 12. Output pulse control using retrigger pulse nA 001aae526 nB input nQ output nA input trtrig tW tW tW tW
74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 15 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset
12.1.3 Reset timing
12.2 Power considerations
12.2.1 Power-up
When the monostable multivibrator is powered-up, it may produce an output pulse with a pulse width defined by the values of REXT and CEXT . This output pulse can be eliminated using the RC circuit on pin nRD shown inFigure14.
12.2.2 Power-down
A large capacitor (CEXT ) may cause problems when powering-down the monostable due to the energy stored in this capacitor. When a system containing this device is powered-down or a rapid decrease of V CC to zero occurs, the monostable may sustain damage, due to the capacitor discharging through the input protection diodes. To avoid this possibility, connect a damping diode D EXT (preferably a germanium or Schottky type diode) able to withstand large current surges - seeFigure14. nA = LOW Fig 13. Output pulse control using reset input nRD 001aae527 nB input nQ output nRD input tWtW Fig 14. Power-up and power-down circuit 001aae532 VCCRESET nRD C EXT R EXT D EXT nA nB VCC nCEXTGND nREXT/CEXT nQ nQ 74LV123 13 (5) 4 (12) 15 (7)14 (6)8 1 (9) 2 (10) 3 (11)
74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 16 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 13. Package outline Fig 15. Package outline SOT38-4 (DIP16) REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT38-4 95-01-14 03-02-13 M H c (e )1 M E A L seating plane w M e D A 2 Z E pin 1 index b 0 5 10 mm scale Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. UNIT A max. 12 b1 (1) (1) (1) b2 cD E e M ZHL mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) A min. A max. b max.wM Ee1 1.73 1.30 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 3.60 7.80 10.0 inches 0.068 0.051 0.021 0.015 0.014 0.009 1.25 0.85 0.049 0.033 0.77 0.73 0.26 0.24 0.14 0.31 0.39 DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 17 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset Fig 16. Package outline SOT109-1 (SO16) X w M q AA 1 A 2 bp D H E Lp Q detail X E Z e c L v M A (A )3 A y pin 1 index UNIT A max. A 1 A 2 A 3 bp cD (1) E (1) (1)eH E LL p QZ ywv q REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 SOT109-1 99-12-27 03-02-19 076E07 MS-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.0410.244 0.228 0.028 0.020 0.028 0.0120.01 0.25 0.01 0.0040.039 0.016 0 2.5 5 mm scale SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 18 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset Fig 17. Package outline SOT338-1 (SSOP16) UNIT A 1 A 2 A 3 bp cD (1) E (1) eH E LL p QZ ywv q REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.257.9 7.6 1.03 0.63 0.9 0.7 1.00 0.55 o o0.130.2 0.1 DIMENSIONS (mm are the original dimensions) Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. SOT338-1 99-12-27 03-02-19 (1) w M bp D H E E Z e c v M A X A y 1 8 16 9 q AA 1 A 2 Lp Q detail X L (A )3 MO-150 pin 1 index 0 2.5 5 mm scale SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 A max.
74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 19 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset Fig 18. Package outline SOT403-1 (TSSOP16) UNIT A 1 A 2 A 3 bp cD (1) E (2) (1)eH E LL p QZ ywv q REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 o o0.13 0.10.21 DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 SOT403-1 MO-153 99-12-27 03-02-18 w M bp D Z e 0.25 16 9 q AA 1 A 2 Lp Q detail X L (A )3 H E E c v M A XA y 0 2.5 5 mm scale TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 A max. 1.1 pin 1 index
74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 20 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset Fig 19. Package outline SOT736-1 (DHVQFN16) terminal 1 index area 0.51 A 1 EhbUNIT ye 0.2 c REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 3.6 3.4 D h 2.15 1.85 2.6 2.4 1.15 0.85 2.50.30 0.18 0.05 0.00 0.05 0.1 DIMENSIONS (mm are the original dimensions) 0.5 0.3 L 0.1 v 0.05 w 0 2.5 5 mm scale SOT763-1 DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm A (1) max. A c detail X yy1 Ce L Eh D h e b 15 10 X D E C B A terminal 1 index area AC C Bv M w M E (1) Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. D (1) 02-10-17 03-01-27
74LV123_5 © NXP B.V. 2007. All rights reserved. Table 10. Revision history
- Changed: SOT38-1 changed into SOT38-4 74LV123_4 20070919 Product specification - 74LV123_3 74LV123_3 20030313 Product specification - 74LV123_2 74LV123_2 19980420 Product specification - 74LV123_1 74LV123_1 19970204 Product specification - -
74LV123_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 8 November 2007 22 of 23 NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset 15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
15.3 Disclaimers
General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values —Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For additional information, please visit:http://www.nxp.com For sales office addresses, send an email to:salesaddresses@nxp.com Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors 74LV123 Dual retriggerable monostable multivibrator with reset © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 8 November 2007 Document identifier: 74LV123_5 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 17. Contents