74LV03 PHILIPS | Alldatasheet
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/C0109 /C0110 /C0114 74LV03 Quad 2-input NAND gate Product specification Supersedes data of 1997 Mar 28 IC24 Data Handbook
1998 Apr 20
Philips Semiconductors Product specification 74LV03Quad 2-input NAND gate
21998 Apr 20 853–1963 19257
FEATURES
- Wide operating voltage: 1.0 to 5.5V
- Optimized for Low Voltage applications: 1.0 to 3.6V
- Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V
- Typical VOLP (output ground bounce) 0.8V @ VCC = 3.3V, Tamb = 25°C
- Typical VOHV (output VOH undershoot) 2V @ VCC = 3.3V, Tamb = 25°C
- Level shifter capability
- Output capability: standard (open drain)
- ICC category: SSI
DESCRIPTION
The 74LV03 is a low–voltage Si–gate CMOS device and is pin and function compatible with 74HC/HCT03. The 74LV03 provides the 2–input NAND function. The 74LV03 has open–drain N–transistor outputs, which are not clamped by a diode connected to V CC . In the OFF–state, i.e. when one input is LOW, the output may be pulled to any voltage between GND and V Omax . This allows the device to be used as a LOW–to–HIGH or HIGH–to–LOW level shifter. For digital operation and OR–tied output applications, these devices must have a pull–up resistor to establish a logic HIGH level. QUICK REFERENCE DATA GND = 0V; Tamb = 25°C; tr =tf 2.5 ns SYMBOL PARAMETER CONDITIONS TYPICAL UNIT tPZL /tPLZ Propagation delay nA, nB to nY C L = 15pF VCC = 3.3V 8 ns C I Input capacitance 3.5 pF C PD Power dissipation capacitance per gateNotes 1, 2 4 pF NOTES: 1C PD is used to determine the dynamic power dissipation (PD in µW) PD = CPD VCC 2 x fi (CL VCC 2 fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL VCC 2 fo) = sum of the outputs.
2 The condition is VI = GND to VCC
3 The given value of CPD is obtained with : CL = 0 pF and RL = ∞
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # 14-Pin Plastic DIL –40°C to +125°C 74LV03 N 74LV03 N SOT27-1 14-Pin Plastic SO –40°C to +125°C 74LV03 D 74LV03 D SOT108-1 14-Pin Plastic SSOP Type II –40°C to +125°C 74LV03 DB 74LV03 DB SOT337-1 14-Pin Plastic TSSOP Type I –40°C to +125°C 74LV03 PW 74LV03PW DH SOT402-1 PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 1, 4, 9, 12 1A to 4A Data inputs 2, 5, 10, 13 1B to 4B Data inputs 3, 6, 8, 11 1Y to 4Y Data outputs
7 GND Ground (0V)
14 VCC Positive supply voltage
NOTES: H = HIGH voltage level L = LOW voltage level Z = High impedance OFF-state
Philips Semiconductors Product specification 74LV03Quad 2-input NAND gate
1998 Apr 20 3
LOGIC SYMBOL (IEEE/IEC) SV00356 LOGIC SYMBOL SV00355 LOGIC DIAGRAM A GND Y B SV00357
Philips Semiconductors Product specification 74LV03Quad 2-input NAND gate
1998 Apr 20 4
RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS MIN TYP. MAX UNIT VCC DC supply voltage See Note1 1.0 3.3 5.5 V VI Input voltage 0 – VCC V VO Output voltage 0 – VCC V Tamb Operating ambient temperature range in free air See DC and AC characteristics –40 –40 +85 +125 °C tr, tf Input rise and fall times VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V 500 200 100 ns/V NOTES: 1 The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC ); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V. ABSOLUTE MAXIMUM RATINGS 1, 2 In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) SYMBOL PARAMETER CONDITIONS RATING UNIT VCC DC supply voltage –0.5 to +7.0 V ±IIK DC input diode current VI < –0.5 or VI > VCC + 0.5V 20 mA ±IOK DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA ±IO DC output source or sink current – standard outputs –0.5V < VO < VCC + 0.5V 25 mA ±IGND , ±ICC DC V CC or GND current for types with –standard outputs 50 mA Tstg Storage temperature range –65 to +150 °C PTOT Power dissipation per package –plastic DIL –plastic mini-pack (SO) –plastic shrink mini-pack (SSOP and TSSOP) for temperature range: –40 to +125°C above +70°C derate linearly with 12mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K 750 500 400 mW NOTES: 1 Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2 The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors Product specification 74LV03Quad 2-input NAND gate
1998 Apr 20 5
Over recommended operating conditions voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS -40°C to +85°C -40°C to +125°C UNIT MIN TYP 1 MAX MIN MAX VCC = 1.2V 0.9 0.9 VIH VCC = 4.5 to 5.5V 0.7*VCC 0.7*VCC VCC = 1.2V 0.3 0.3 VIL VCC = 4.5 to 5.5 0.3*VCC 0.3*VCC VCC = 1.2V; VI = VIH or VIL; –IO = 100µA 1.2 HIGH level output VCC = 2.0V; VI = VIH or VIL; –IO = 100µA 1.8 2.0 1.8 VOH HIGH level output voltage;all outputs VCC = 2.7V; VI = VIH or VIL; –IO = 100µA 2.5 2.7 2.5 Vvoltage all out uts VCC = 3.0V; VI = VIH or VIL; –IO = 100µA 2.8 3.0 2.8 VCC = 4.5V;VI = VIH or VIL; –IO = 100µA 4.3 4.5 4.3 VOH HIGH level output voltage; VCC = 3.0V;VI = VIH or VIL; –IO = 6mA 2.40 2.82 2.20 VVOH g STANDARD outputs VCC = 4.5V;VI = VIH or VIL; –IO = 12mA 3.60 4.20 3.50 V VCC = 1.2V; VI = VIH or VIL; IO = 100µA 0 LOW level output VCC = 2.0V; VI = VIH or VIL; IO = 100µA 0 0.2 0.2 VOL LOW level output voltage;all outputs VCC = 2.7V; VI = VIH or VIL; IO = 100µA 0 0.2 0.2 Vvoltage all out uts VCC = 3.0V;VI = VIH or VIL; IO = 100µA 0 0.2 0.2 VCC = 4.5V;VI = VIH or VIL; IO = 100µA 0 0.2 0.2 VOL LOW level output voltage; VCC = 3.0V;VI = VIH or VIL; IO = 6mA 0.25 0.40 0.50 VVOL g STANDARD outputs VCC = 4.5V;VI = VIH or VIL; IO = 12mA 0.35 0.55 0.65 V IOZ HIGH level output leakage current VCC = 2.0 to 3.6V; VI = VIL; VO = VCC or GND 5.0 10 µA IOZ HIGH level output leakage current VCC = 2.0 to 3.6V; VI = VIL; VO = 6.0V2 10 20 µA II Input leakage current VCC = 5.5V; VI = VCC or GND 1.0 1.0 µA ICC Quiescent supply current; SSI VCC = 5.5V; VI = VCC or GND; IO = 0 20.0 40 µA ΔICC Additional quiescent supply current per input VCC = 2.7V to 3.6V; VI = VCC –0.6V 500 850 µA NOTES: 1 All typical values are measured at Tamb = 25°C. 2 The maximum operating output voltage (VO(max)) is 6.0V.
1998 Apr 20 6
1 Unless otherwise stated, all typical values are at Tamb = 25°C. 2 Typical value measured at VCC = 3.3V. 3 Typical value measured at VCC = 5.0V. Figure 1. Input (nA, nB) to output (nY) propagation delays. R T = Termination resistance should be equal to ZOUT of pulse generators. C L = Load capacitance includes jig and probe capacitiance. Figure 2. Load circuitry for switching times
Philips Semiconductors Product specification 74LV03Quad 2-input NAND gate
1998 Apr 20 7
DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1
Philips Semiconductors Product specification 74LV03Quad 2-input NAND gate
1998 Apr 20 8
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
Philips Semiconductors Product specification 74LV03Quad 2-input NAND gate
1998 Apr 20 9
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1
Philips Semiconductors Product specification 74LV03Quad 2-input NAND gate
1998 Apr 20 10
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
Philips Semiconductors Product specification 74LV03Quad 2-input NAND gate
1998 Apr 20 11
Philips Semiconductors Product specification 74LV03Quad 2-input NAND gate yyyy mmm dd 12 Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors
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P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Date of release: 08-98 Document order number: 9397-750-04403 /C0109 /C0110 /C0114 Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Production Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Data sheet status [1] Please consult the most recently issued datasheet before initiating or completing a design.