SN74LV00A TI | Alldatasheet
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/C0083/C0078/C0053/C0052/C0076/C0086/C0048/C0048/C0065/C0044 /C0083/C0078/C0055/C0052/C0076/C0086/C0048/C0048/C0065 /C0081/C0085/C0065/C0068/C0082/C0085/C0080/C0076/C0069 /C0050/C0262/C0073/C0078/C0080/C0085/C0084 /C0080/C0079/C0083/C0073/C0084/C0073/C0086/C0069/C0262/C0078/C0065/C0078/C0068 /C0071/C0065/C0084/C0069/C0083 SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C00682-V to 5.5-V VCC Operation /C0068Max tpd of 6.5 ns at 5 V /C0068Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C /C0068Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C /C0068Support Mixed-Mode Voltage Operation on All Ports /C0068Ioff Supports Partial-Power-Down Mode Operation /C0068Latch-Up Performance Exceeds 250 mA Per JESD 17 /C0068ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) SN54LV00A ...J O R W PACKAGE SN74LV00A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) GND V CC 3212 0 1 9 91 0 1 1 1 2 1 3 NC NC NC NC SN54LV00A . . . FK PACKAGE (TOP VIEW)1B NC V GND NC CC NC − No internal connection SN74LV00A . . . RGY PACKAGE (TOP VIEW) 11 4 3Y V GND CC description/ordering information These quadruple 2-input positive-NAND gates are designed for 2-V to 5.5-V VCC operation. The ’LV00A devices perform the Boolean function Y = A • B or Y = A + B in positive logic.
ORDERING INFORMATION
TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING QFN − RGY Reel of 1000 SN74LV00ARGYR LV00A SOIC − D Tube of 50 SN74LV00AD LV00ASOIC − D Reel of 2500 SN74LV00ADR LV00A SOP − NS Reel of 2000 SN74LV00ANSR 74LV00A −40°C to 85°C SSOP − DB Reel of 2000 SN74LV00ADBR LV00A−40 C to 85C Tube of 90 SN74LV00APW TSSOP − PW Reel of 2000 SN74LV00APWR LV00ATSSOP − PW Reel of 250 SN74LV00APWT LV00A TVSOP − DGV Reel of 2000 SN74LV00ADGVR LV00A CDIP − J Tube of 25 SNJ54LV00AJ SNJ54LV00AJ −55°C to 125°C CFP − W Tube of 150 SNJ54LV00AW SNJ54LV00AW−55 C to 125C LCCC - FK Tube of 55 SNJ54LV00AFK SNJ54LV00AFK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2005, Texas Instruments Incorporated/C0085/C0078/C0076/C0069/C0083/C0083 /C0079/C0084/C0072/C0069/C0082/C0087/C0073/C0083/C0069 /C0078/C0079/C0084/C0069/C0068 /C0116/C0104/C0105/C0115 /C0100/C0111/C0099/C0117/C0109/C0101/C0110/C0116 /C0099/C0111/C0110/C0116/C0097/C0105/C0110/C0115 /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
/C0083/C0078/C0053/C0052/C0076/C0086/C0048/C0048/C0065/C0044 /C0083/C0078/C0055/C0052/C0076/C0086/C0048/C0048/C0065 /C0081/C0085/C0065/C0068/C0082/C0085/C0080/C0076/C0069 /C0050/C0262/C0073/C0078/C0080/C0085/C0084 /C0080/C0079/C0083/C0073/C0084/C0073/C0086/C0069/C0262/C0078/C0065/C0078/C0068 /C0071/C0065/C0084/C0069/C0083 SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued) These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. FUNCTION TABLE (each gate) INPUTS OUTPUT A B OUTPUT Y H H L L XH X L H logic diagram, each gate (positive logic) A B Y absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Voltage range applied to any output in the high-impedance † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 4. The package thermal impedance is calculated in accordance with JESD 51-5.
/C0083/C0078/C0053/C0052/C0076/C0086/C0048/C0048/C0065/C0044 /C0083/C0078/C0055/C0052/C0076/C0086/C0048/C0048/C0065 /C0081/C0085/C0065/C0068/C0082/C0085/C0080/C0076/C0069 /C0050/C0262/C0073/C0078/C0080/C0085/C0084 /C0080/C0079/C0083/C0073/C0084/C0073/C0086/C0069/C0262/C0078/C0065/C0078/C0068 /C0071/C0065/C0084/C0069/C0083 SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (see Note 5) SN54LV00A SN74LV00A UNITMIN MAX MIN MAX UNIT VCC Supply voltage 2 5.5 2 5.5 V VCC = 2 V 1.5 1.5 VIH High-level input voltage VCC = 2.3 V to 2.7 V VCC × 0.7 VCC × 0.7 VVIH High-level input voltage VCC = 3 V to 3.6 V VCC × 0.7 VCC × 0.7 V VCC = 4.5 V to 5.5 V VCC × 0.7 VCC × 0.7 VCC = 2 V 0.5 0.5 VIL Low-level input voltage VCC = 2.3 V to 2.7 V VCC × 0.3 VCC × 0.3 VVIL Low-level input voltage VCC = 3 V to 3.6 V VCC × 0.3 VCC × 0.3 V VCC = 4.5 V to 5.5 V VCC × 0.3 VCC × 0.3 VI Input voltage 0 5.5 0 5.5 V VO Output voltage 0 VCC 0 VCC V VCC = 2 V −50 −50 µA IOH High-level output current VCC = 2.3 V to 2.7 V −2 −2 IOH High-level output current VCC = 3 V to 3.6 V −6 −6 mA VCC = 4.5 V to 5.5 V −12 −12 mA VCC = 2 V 50 50 µA IOL Low-level output current VCC = 2.3 V to 2.7 V 2 2 IOL Low-level output current VCC = 3 V to 3.6 V 6 6 mA VCC = 4.5 V to 5.5 V 12 12 mA VCC = 2.3 V to 2.7 V 200 200 ∆t/∆v Input transition rise or fall rateVCC = 3 V to 3.6 V 100 100 ns/V∆t/∆v Input transition rise or fall rate VCC = 4.5 V to 5.5 V 20 20 ns/V TA Operating free-air temperature −55 125 −40 85 °C NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC SN54LV00A SN74LV00A UNITPARAMETER TEST CONDITIONS VCC MIN TYP MAX MIN TYP MAX UNIT IOH = −50 µA 2 V to 5.5 VVCC −0.1 VCC −0.1 VOH IOH = −2 mA 2.3 V 2 2 VVOH IOH = −6 mA 3 V 2.48 2.48 V IOH = −12 mA 4.5 V 3.8 3.8 IOL = 50 µA 2 V to 5.5 V 0.1 0.1 VOL IOL = 2 mA 2.3 V 0.4 0.4 VVOL IOL = 6 mA 3 V 0.44 0.44 V IOL = 12 mA 4.5 V 0.55 0.55 II VI = 5.5 V or GND 0 to 5.5 V ±1 ±1 µA ICC VI = VCC or GND, IO = 0 5.5 V 20 20 µA Ioff VI or VO = 0 to 5.5 V 0 5 5 µA C i VI = VCC or GND 3.3 V 3.3 3.3 pFC i VI = VCC or GND 5 V 3.3 3.3 pF /C0080/C0082/C0079/C0068/C0085/C0067/C0084 /C0080/C0082/C0069/C0086/C0073/C0069/C0087 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0099/C0111/C0110/C0099/C0101/C0114/C0110/C0115 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0105/C0110 /C0116/C0104/C0101 /C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0118/C0101 /C0111/C0114 /C0100/C0101/C0115/C0105/C0103/C0110 /C0112/C0104/C0097/C0115/C0101 /C0111/C0102 /C0100/C0101/C0118/C0101/C0108/C0111/C0112/C0109/C0101/C0110/C0116/C0046 /C0067/C0104/C0097/C0114/C0097/C0099/C0116/C0101/C0114/C0105/C0115/C0116/C0105/C0099 /C0100/C0097/C0116/C0097 /C0097/C0110/C0100 /C0111/C0116/C0104/C0101/C0114 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0097/C0114/C0101 /C0100/C0101/C0115/C0105/C0103/C0110 /C0103/C0111/C0097/C0108/C0115/C0046 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0114/C0101/C0115/C0101/C0114/C0118/C0101/C0115 /C0116/C0104/C0101 /C0114/C0105/C0103/C0104/C0116 /C0116/C0111 /C0099/C0104/C0097/C0110/C0103/C0101 /C0111/C0114 /C0100/C0105/C0115/C0099/C0111/C0110/C0116/C0105/C0110/C0117/C0101 /C0116/C0104/C0101/C0115/C0101 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0119/C0105/C0116/C0104/C0111/C0117/C0116 /C0110/C0111/C0116/C0105/C0099/C0101/C0046
/C0083/C0078/C0053/C0052/C0076/C0086/C0048/C0048/C0065/C0044 /C0083/C0078/C0055/C0052/C0076/C0086/C0048/C0048/C0065 /C0081/C0085/C0065/C0068/C0082/C0085/C0080/C0076/C0069 /C0050/C0262/C0073/C0078/C0080/C0085/C0084 /C0080/C0079/C0083/C0073/C0084/C0073/C0086/C0069/C0262/C0078/C0065/C0078/C0068 /C0071/C0065/C0084/C0069/C0083 SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO LOAD TA = 25°C SN54LV00A SN74LV00A UNITPARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE MIN TYP MAX MIN MAX MIN MAX UNIT tpd A Y C L = 15 pF 7.1* 12.9* 1* 16* 1 15 nstpd A Y C L = 50 pF 9.6 16.6 1 21 1 20 ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO LOAD TA = 25°C SN54LV00A SN74LV00A UNITPARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE MIN TYP MAX MIN MAX MIN MAX UNIT tpd A Y C L = 15 pF 5* 7.9* 1* 10.5* 1 9.5 nstpd A Y C L = 50 pF 6.9 11.4 1 14 1 13 ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO LOAD TA = 25°C SN54LV00A SN74LV00A UNITPARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE MIN TYP MAX MIN MAX MIN MAX UNIT tpd A Y nstpd A Y C L = 50 pF 4.9 7.5 1 9.5 1 8.5 ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. noise characteristics, VCC = 3.3 V, CL = 50 pF, TA = 25°C (see Note 6) PARAMETER SN74LV00A UNITPARAMETER MIN TYP MAX UNIT VOL(P) Quiet output, maximum dynamic VOL 0.2 0.8 V VOL(V) Quiet output, minimum dynamic VOL −0.1 −0.8 V VOH(V) Quiet output, minimum dynamic VOH 3.1 V VIH(D) High-level dynamic input voltage 2.31 V VIL(D) Low-level dynamic input voltage 0.99 V NOTE 6: Characteristics are for surface-mount packages only. operating characteristics, TA = 25°C PARAMETER TEST CONDITIONS VCC TYP UNIT C pd Power dissipation capacitance C L = 50 pF, f = 10 MHz 3.3 V 9.5 pFC pd Power dissipation capacitance C L = 50 pF, f = 10 MHz
5 V 11
/C0080/C0082/C0079/C0068/C0085/C0067/C0084 /C0080/C0082/C0069/C0086/C0073/C0069/C0087 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0099/C0111/C0110/C0099/C0101/C0114/C0110/C0115 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0105/C0110 /C0116/C0104/C0101 /C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0118/C0101 /C0111/C0114 /C0100/C0101/C0115/C0105/C0103/C0110 /C0112/C0104/C0097/C0115/C0101 /C0111/C0102 /C0100/C0101/C0118/C0101/C0108/C0111/C0112/C0109/C0101/C0110/C0116/C0046 /C0067/C0104/C0097/C0114/C0097/C0099/C0116/C0101/C0114/C0105/C0115/C0116/C0105/C0099 /C0100/C0097/C0116/C0097 /C0097/C0110/C0100 /C0111/C0116/C0104/C0101/C0114 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0097/C0114/C0101 /C0100/C0101/C0115/C0105/C0103/C0110 /C0103/C0111/C0097/C0108/C0115/C0046 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0114/C0101/C0115/C0101/C0114/C0118/C0101/C0115 /C0116/C0104/C0101 /C0114/C0105/C0103/C0104/C0116 /C0116/C0111 /C0099/C0104/C0097/C0110/C0103/C0101 /C0111/C0114 /C0100/C0105/C0115/C0099/C0111/C0110/C0116/C0105/C0110/C0117/C0101 /C0116/C0104/C0101/C0115/C0101 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0119/C0105/C0116/C0104/C0111/C0117/C0116 /C0110/C0111/C0116/C0105/C0099/C0101/C0046
NOTES: A. C L includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time, with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPHL and tPLH are the same as tpd . H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms
Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) SN74LV00AD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00ADBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI SN74LV00ADBR ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00ADBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00ADE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00ADGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00ADGVRE4 ACTIVE TVSOP DGV 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00ADR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00ADRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00ANSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00ANSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00APW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00APWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00APWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00APWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI SN74LV00APWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00APWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00APWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00APWT ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00APWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV00ARGYR ACTIVE QFN RGY 14 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. PACKAGE OPTION ADDENDUM www.ti.com 9-Aug-2005 Addendum-Page 1
TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 9-Aug-2005 Addendum-Page 2
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
3,70 3,50 4,90 5,10 20DIM PINS ** 4073251/E 08/00 1,20 MAX Seating Plane 0,05 0,15 0,25 0,50 0,75 0,23 0,13 11 2 24 13 4,30 4,50 0,16 NOM Gage Plane A 7,90 7,70 382416 4,90 5,103,70 3,50 A MAX A MIN 6,60 6,20 11,20 11,40 9,60 9,80 0,08 M0,070,40 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 4040065 /E 12/01
28 PINS SHOWN
8,20 7,40 0,55 0,95 0,25 12,90 12,30 10,50 8,50 Seating Plane 9,907,90 10,50 9,90 0,38 5,60 5,00 0,22 A 2016 6,506,50 0,05 MIN 5,905,90 DIM A MAX A MIN PINS ** 2,00 MAX 6,90 7,50 0,65 M0,15 0°–/C02578° 0,10 0,09 0,25 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65 M0,10 0,10 0,25 0,50 0,75 0,15 NOM Gage Plane 9,80 9,60 7,90 7,70 2016 6,60 6,40 4040064/F 01/97 0,30 6,60 6,20 0,19 4,30 4,50 0,15 A 1,20 MAX 5,10 4,90 3,10 2,90 A MAX A MIN DIM PINS ** 0,05 4,90 5,10 Seating Plane 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153
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