DM54LS373 NSC | Alldatasheet
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Y Choice of 8 latches or 8 D-type flip-flops in a single package Y TRI-STATE bus-driving outputs Y Full parallel-access for loading Y Buffered control inputs Y P-N-P inputs reduce D-C loading on data lines Connection Diagrams Dual-In-Line Packages ’LS373 TL/F/6431–1 Order Number DM54LS373J, DM54LS373W, DM74LS373N or DM74LS373WM See NS Package Number J20A, M20B, N20A or W20A ’LS374 TL/F/6431–2 Order Number DM54LS374J, DM54LS374W, DM74LS374WM or DM74LS374N See NS Package Number J20A, M20B, N20A or W20A TRI-STATEÉ is a registered trademark of National Semiconductor Corp. C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
General Description (Continued) The eight latches of the DM54/74LS373 are transparent D- type latches meaning that while the enable (G) is high the Q outputs will follow the data (D) inputs. When the enable is taken low the output will be latched at the level of the data that was set up. The eight flip-flops of the DM54/74LS374 are edge-trig- gered D-type flip flops. On the positive transition of the clock, the Q outputs will be set to the logic states that were set up at the D inputs. A buffered output control input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines signifi- cantly. The output control does not affect the internal operation of the latches or flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are off. Function Tables DM54/74LS373 Output Enable D OutputControl G LH H H LH L L LL X Q HX X Z DM54/74LS374 Output Clock D OutputControl L u HH L u LL LL X Q 0 HX X Z H e High Level (Steady State), L e Low Level (Steady State), X e Don’t Care u e Transition from low-to-high level, Z e High Impedance State Q0 e The level of the output before steady-state input conditions were established. Logic Diagrams DM54/74LS373 Transparent Latches TL/F/6431–3 DM54/74LS374 Positive-Edge-Triggered Flip-Flops TL/F/6431–4
Absolute Maximum Ratings (See Note) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 7V Storage Temperature Range b65§Ct o a150§C Operating Free Air Temperature Range DM54LS b55§Ct o a125§C DM74LS 0 §Ct o a70§C Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaran- teed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation. Recommended Operating Conditions Symbol Parameter DM54LS373 DM74LS373 Units Min Nom Max Min Nom Max VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V VIH High Level Input Votage 2 2 V VIL Low Level Input Voltage 0.7 0.8 V IOH High Level Output Current b1 b2.6 mA IOL Low Level Output Current 12 24 mA tW Pulse Width Enable High 15 15 ns(Note 2) Enable Low 15 15 tSU Data Setup Time (Note s1&2 ) 5 v 5v ns tH Data Hold Time (Note s1&2 ) 2 0 v 20v ns TA Free Air Operating Temperature b55 125 0 70 §C Note 1: The symbol ( v) indicates the falling edge of the clock pulse is used for reference. Note 2: TA e 25§C and V CC e 5V. ’LS373 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units(Note 1) VI Input Clamp Voltage V CC e Min, I I eb 18 mA b1.5 V VOH High Level Output Voltage V CC e Min DM54 2.4 3.4IOH e Max VVIL e Max DM74 2.4 3.1VIH e Min VOL Low Level Output Voltage V CC e Min DM54 0.25 0.4IOL e Max VIL e Max DM74 0.35 0.5 VVIH e Min IOL e 12 mA DM74 0.4VCC e Min II Input Current @ Max V CC e Max, V I e 7V 0.1 mAInput Voltage IIH High Level Input Current V CC e Max, V I e 2.7V 20 mA IIL Low Level Input Current V CC e Max, V I e 0.4V b0.4 mA IOZH Off-State Output Current V CC e Max, V O e 2.7V with High Level Output V IH e Min, V IL e Max 20 mAVoltage Applied IOZL Off-State Output Current V CC e Max, V O e 0.4V with Low Level Output V IH e Min, V IL e Max b20 mAVoltage Applied IOS Short Circuit V CC e Max DM54 b20 b100 mAOutput Current (Note 2) DM74 b50 b225 ICC Supply Current V CC e Max, OC e 4.5V, 24 40 mADn, Enable e GND
‘LS373 Switching Characteristics at V CC e 5V and T A e 25§C (See Section 1 for Test Waveforms and Output Load) From R L e 667X (Input)Symbol Parameter C L e 45 pF C L e 150 pF UnitsTo Min Max Min Max(Output) tPLH Propagation Delay Data Time Low to High to 18 26 ns Level Output Q tPHL Propagation Delay Data Time High to Low to 18 27 ns Level Output Q tPLH Propagation Delay Enable Time Low to High to 30 38 ns Level Output Q tPHL Propagation Delay Enable Time High to Low to 30 36 ns Level Output Q tPZH Output Enable Output Time to High Control 28 36 ns Level Output to Any Q tPZL Output Enable Output Time to Low Control 36 50 ns Level Output to Any Q tPHZ Output Disable Output Time from High Control 20 ns Level Output (Note 3) to Any Q tPLZ Output Disable Output Time from Low Control 25 ns Level Output (Note 3) to Any Q Note 1: All typicals are at V CC e 5V, T A e 25§C. Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 3: CL e 5 pF. Recommended Operating Conditions Symbol Parameter DM54LS374 DM74LS374 Units Min Nom Max Min Nom Max VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V VIH High Level Input Voltage 2 2 V VIL Low Level Input Voltage 0.7 0.8 V IOH High Level Output Current b1 b2.6 mA IOL Low Level Output Current 12 24 mA tW Pulse Width Clock High 15 15 ns(Note 4) Clock Low 15 15 tSU Data Setup Time (Note s1&4 ) 2 0 u 20u ns tH Data Hold Time (Note s1&4 ) 1 u 1u ns TA Free Air Operating Temperature b55 125 0 70 §C Note 1: The symbol ( u) indicates the rising edge of the clock pulse is used for reference. Note 4: TA e 25§C and V CC e 5V.
’LS374 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units(Note 1) VI Input Clamp Voltage V CC e Min, I I eb 18 mA b1.5 V VOH High Level Output Voltage V CC e Min DM54 2.4 3.4 IOH e Max DM74 2.4 3.1 VVIL e Max VIH e Min VOL Low Level Output Voltage V CC e Min DM54 0.25 0.4 IOL e Max DM74 0.35 0.5VIL e Max VVIH e Min IOL e 12 mA DM74 0.25 0.4VCC e Min II Input Current @ Max V CC e Max, V I e 7V 0.1 mAInput Voltage IIH High Level Input Current V CC e Max, V I e 2.7V 20 mA IIL Low Level Input Current V CC e Max, V I e 0.4V b0.4 mA IOZH Off-State Output V CC e Max, V O e 2.7V Current with High V IH e Min, V IL e Max 20 mALevel Output Voltage Applied IOZL Off-State Output V CC e Max, V O e 0.4V Current with Low V IH e Min, V IL e Max b20 mALevel Output Voltage Applied IOS Short Circuit V CC e Max DM54 b50 b225 mAOutput Current (Note 2) DM74 b50 b225 ICC Supply Current V CC e Max, D n e GND, OC e 4.5V 27 45 mA ’LS374 Switching Characteristics at V CC e 5V and T A e 25§C (See Section 1 for Test Waveforms and Output Load) RL e 667X Symbol Parameter C L e 45 pF C L e 150 pF Units Min Max Min Max fMAX Maximum Clock Frequency 35 20 MHz tPLH Propagation Delay Time 28 32 nsLow to High Level Output tPHL Propagation Delay Time 28 38 nsHigh to Low Level Output tPZH Output Enable Time 28 44 nsto High Level Output tPZL Output Enable Time 28 44 nsto Low Level Output tPHZ Output Disable Time 20 nsfrom High Level Output (Note 3) tPLZ Output Disable Time 25 nsfrom Low Level Output (Note 3) Note 1: All typicals are at V CC e 5V, T A e 25§C. Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 3: CL e 5 pF.
Physical Dimensions inches (millimeters) 20-Lead Ceramic Dual-In-Line Package (J) Order Number DM54LS373J or DM54LS374J
Physical Dimensions inches (millimeters) (Continued) 20-Lead Wide Small Outline Molded Package (M) Order Number DM74LS373WM or DM74LS374WM 20-Lead Molded Dual-In-Line Package (N) Order Number DM74LS373N and DM74LS374N
DM54LS373/DM74LS373, DM54LS374/DM74LS374 TRI-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops Physical Dimensions inches (millimeters) (Continued) 20-Lead Ceramic Flat Package (W) Order Number DM54LS373W or DM54LS374W LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.
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