54LS245D2 ETC | Alldatasheet
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Technical content
DESCRIPTION
The T54LS245/T74LS245 is an Octal Bus Transcei- "% / } V ver intended for 8-line asynchronous 2-way data \\ a \\ communication between data buses. Direction In- \\ q 20°" put (DR) takes over the transmission of Data from 1 1 bus A to bus B or bus B to bus A depending on _ BI 01/02 its logic level. Enable input is usable for isolation Plastic Package Ceramic Package of the buses. af ® Mt C1 Micro Package Plastic Chip Carrier ORDERING NUMBERS: T54LS245 D2 T74LS245 C1 T74LS245 D1 T74LS245 M1 T74LS8245 B1 PIN CONNECTION 2.WAY ASYNCHRONOUS DATA BUS (top view) COMUNICATION DUAL IN LINE e HYSTERESIS INPUTS TO IMPROVE = fo NOISE IMMUNITY * cama ve ¢ INPUT DIODES LIMIT HIGH-SPEED * net ‘ TERMINATION EFFECTS “ eit ¢ & » Cyt eps, As LS beph B s Sabb 8 As Sy 8 A Steph 8 Sen a Ef Put Be “ qi ® poneee TRUTH TABLE CHIP CARRIER r28 Fu output ooo ran «Oe a4 fs oe L L Bus B Data to Bus A aos «Oe L H Bus A Data to Bus B 4s (17 5s O& H X | Isolation MO ae 4" MMM H=HIGH Voltage Level eieean"™ x otage Level NC =No Internal Connection 379 4187 EEE EES
Vo | Supply Vakage Vv Vi Input Voltage, Applied to Input V Vo Output Voltage, Applied to Output 0 to 10 Vv i Input Current, Into Inputs [305 | mA lo Output Current, Into Outputs a mA Stresses in excess of those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions in excess of those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. GUARANTEED OPERATING RANGES Ss ly Volt Part Numbers Meply Vonage Temperature | win [typ [Max | Teal S280 TSC 10 41250 T74LS245XX 4.75 V 5.25 V 0°C to +70°C XX = package type. DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE Test Conditions Symbol Parameter Units Vin Input HIGH Voltage 2.0 Guaranteed input HIGH Voltage Vv for all Inputs ViL Input LOW Voltage [se [ [| [o7| Guaranteed input LOW Voltage Veo Input Clamp Diode Voltage |_| 06s] -1.5 | Voc = MIN, Iiy = —18mA v Vou Output HIGH Voltage [e474 [24 [34 [| Voc=MIN, lo4= —3.0mA 54,74 2.0 lou = —12mA for 54LS _ Vv | | lon= —15mA for 74L§_| Voc MIN loz Output Off Current Low ||| — 200 | Voo= MAX, Voyr=0.4V HA hin Input HIGH Current_ Aor B, DRorE 20 | Voc =MAX,Viy =2.7V nA DR or E 0.1 | Voc =MAX, Vin =7.0V mA AorB 0.1 | Vg =MAX, Vin =5.5V mA im Input LOW Current [| 02 | Veg = MAX,Viy =0.4V mA los Output Short Circuit Current | 40 |__| ~225 | Vog=MAX (Note 2) mA loc Power Supply Current Total, Output HIGH 70 | Voc =MAX mA Total, Output LOW 90 Total at HIGH Z 95 Notes: 1) For conditions shown as MIN or MAX, use the appropriate value specified under guaranteed operating ranges. 2) Not more than one output should be shorted at a time. 3) Typical values are at Vec=5.0V, Ta = 25°C 380
AC CHARACTERISTICS: T, =25°C Symbol Pi Limits T Conditi Uni ymbo! arameter ‘est Conditions nits | min. | Typ. | Max. | teLH Propagation Delay, 8.0 12 ns tpHL Data to Output 8.0 12 tpzH Output Enable Time 25 40 C, = 45pF ns to HIGH Level Ry, = 6670 tpz, Output Enable Time 27 ns to LOW Level tpuz Output Disable Time | [ele] ns from LOW Level C.=5.0pF tpHz Output Disable Time ns from HIGH Level 381
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One possible solution to the important problem of - The mounting system is fully automatic PWB minimization, is that of using surface mounted == - PwB number and the interconnections between components. Integrated circuits in SO (Small them are reduced when the same number of Outline) packages are made up of standard chips devices are used. mounted in very small plastic packages. . 7 . The advantages given by using these devices are: he high thermal meennonents on the board PWB Reduction Noise Reduction and Improved Frequency This is by far the most important advantage since Response the reduction of PWB size varies from 40 to 60% . in comparison with standard board types. (See Wg geduction of the rength of the Fiber sled page 584 for package dimensions.) guarantees a more homogeneous propogation Assembly Cost Reduction gclay between Wee. external pins, with respect to SO Devices require no preliminary operation prior to mounting and can therefore be easily utilized in Assembly Without Board Holes fully automatic equipment. The devices are placed on the board and 3 soldered. This technology permits a higher level Increasing Reliability of tolerance in the positioning (automatic) of the The following characteristics lead to a higher level device. For the standard DIP types this must be of reliability with respect to their standard packag- done with great accuracy due to the insertion of ed counter parts: the leads into their holes.
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