74LS16

SN54LS06_08 TI | Alldatasheet

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/C0083/C0078/C0053/C0052/C0076/C0083/C0048/C0054/C0044 /C0083/C0078/C0055/C0052/C0076/C0083/C0048/C0054/C0044 /C0083/C0078/C0055/C0052/C0076/C0083/C0049/C0054 /C0072/C0069/C0088 /C0073/C0078/C0086/C0069/C0082/C0084/C0069/C0082 /C0066/C0085/C0070/C0070/C0069/C0082/C0083/C0047/C0068/C0082/C0073/C0086/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0079/C0080/C0069/C0078/C0262/C0067/C0079/C0076/C0076/C0069/C0067/C0084/C0079/C0082 /C0072/C0073/C0071/C0072/C0262/C0086/C0079/C0076/C0084/C0065/C0071/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SDLS020E − MAY 1990 − REVISED FEBRUARY 2004 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Convert TTL Voltage Levels to MOS Levels /C0068High Sink-Current Capability /C0068Input Clamping Diodes Simplify System Design /C0068Open-Collector Driver for Indicator Lamps and Relays /C0068Inputs Fully Compatible With Most TTL Circuits description/ordering information These hex inverter buffers/drivers feature high-voltage open-collector outputs to interface with high-level circuits (such as MOS), or for driving high-current loads, and also are characterized for use as inverter buffers for driving TTL inputs. The ’LS06 devices have a rated output voltage of 30 V, and the SN74LS16 has a rated output voltage of 15 V. The maximum sink current for the SN54LS06 is 30 mA, and for the SN74LS06 and SN74LS16 it is 40 mA. These devices are compatible with most TTL families. Inputs are diode-clamped to minimize transmission effects, which simplifies design. Typical power dissipation is 175 mW, and average propagation delay time is 8 ns.

ORDERING INFORMATION

TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP − N Tube SN74LS06N SN74LS06N SOIC − D Tube SN74LS06D LS06 0°C to 70°C SOIC − D Tape and reel SN74LS06DR LS06

0 C to 70C

SOP − NS Tape and reel SN74LS06NSR 74LS06 SSOP − DB Tape and reel SN74LS06DBR LS06 CDIP − J Tube SN54LS06J SN54LS06J −55°C to 125°C CDIP − J Tube SNJ54LS06J SNJ54LS06J−55 C to 125C LCCC − FK Tube SNJ54LS06FK SNJ54LS06FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. The SN74LS16 is obsolete and is no longer supplied. Copyright  2004, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. GND V CC SN54LS06 . . . J PACKAGE SN74LS06, SN74LS16 . . . D, DB, N, OR NS PACKAGE (TOP VIEW) 3 2 1 20 19 91 0 1 1 1 2 1 3 NC NC NC NC NC 4A 6A GND NC NC − No internal connection 4Y V SN54LS06 . . . FK PACKAGE (TOP VIEW) CC /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 /C0079/C0110 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0109/C0112/C0108/C0105/C0097/C0110/C0116 /C0116/C0111 /C0077/C0073/C0076/C0262/C0080/C0082/C0070/C0262/C0051/C0056/C0053/C0051/C0053/C0044 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115 /C0097/C0114/C0101 /C0116/C0101/C0115/C0116/C0101/C0100 /C0117/C0110/C0108/C0101/C0115/C0115 /C0111/C0116/C0104/C0101/C0114/C0119/C0105/C0115/C0101 /C0110/C0111/C0116/C0101/C0100/C0046 /C0079/C0110 /C0097/C0108/C0108 /C0111/C0116/C0104/C0101/C0114 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115/C0044 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046

/C0083/C0078/C0053/C0052/C0076/C0083/C0048/C0054/C0044 /C0083/C0078/C0055/C0052/C0076/C0083/C0048/C0054/C0044 /C0083/C0078/C0055/C0052/C0076/C0083/C0049/C0054 /C0072/C0069/C0088 /C0073/C0078/C0086/C0069/C0082/C0084/C0069/C0082 /C0066/C0085/C0070/C0070/C0069/C0082/C0083/C0047/C0068/C0082/C0073/C0086/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0079/C0080/C0069/C0078/C0262/C0067/C0079/C0076/C0076/C0069/C0067/C0084/C0079/C0082 /C0072/C0073/C0071/C0072/C0262/C0086/C0079/C0076/C0084/C0065/C0071/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SDLS020E − MAY 1990 − REVISED FEBRUARY 2004

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic diagram (positive logic) Pin numbers shown are for the D, DB, J, N, and NS packages. schematic (each gate) Input VCC Output GND 9 kΩ 1 kΩ 2 kΩ 2 kΩ 2.5 kΩ 2.5 kΩ 15 kΩ Resistor values shown are nominal. The SN74LS16 is obsolete and is no longer supplied.

/C0083/C0078/C0053/C0052/C0076/C0083/C0048/C0054/C0044 /C0083/C0078/C0055/C0052/C0076/C0083/C0048/C0054/C0044 /C0083/C0078/C0055/C0052/C0076/C0083/C0049/C0054 /C0072/C0069/C0088 /C0073/C0078/C0086/C0069/C0082/C0084/C0069/C0082 /C0066/C0085/C0070/C0070/C0069/C0082/C0083/C0047/C0068/C0082/C0073/C0086/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0079/C0080/C0069/C0078/C0262/C0067/C0079/C0076/C0076/C0069/C0067/C0084/C0079/C0082 /C0072/C0073/C0071/C0072/C0262/C0086/C0079/C0076/C0084/C0065/C0071/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SDLS020E − MAY 1990 − REVISED FEBRUARY 2004 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to GND. 2. This is the maximum voltage that should be applied to any output when it is in the off state. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4) SN54LS06 SN74LS06 SN74LS16 UNIT MIN NOM MAX MIN NOM MAX UNIT VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V VOH High-level output voltage ’LS06 30 30 VVOH High-level output voltage SN74LS16 15 V IOL Low-level output current 30 40 mA TA Operating free-air temperature −55 125 0 70 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS ‡ SN54LS06 SN74LS06 SN74LS16 UNITPARAMETER TEST CONDITIONS ‡ MIN TYP § MAX MIN TYP § MAX UNIT VIK VCC = MIN, II = −12 mA −1.5 −1.5 V IOH VCC = MIN, VIL = 0.8 V ’LS06, VOH = 30 V 0.25 0.25 mAIOH VCC = MIN, VIL = 0.8 V SN74LS16, V OH = 15 V 0.25 mA IOL = 16 mA 0.25 0.4 0.25 0.4 VOL VCC = MIN, VIH = 2 V IOL = 30 mA 0.7 VVOL VCC = MIN, VIH = 2 V IOL = 40 mA 0.7 V II VCC = MAX, VI = 7 V 1 1 mA IIH VCC = MAX, VI = 2.4 V 20 20 µA IIL VCC = MAX, VI = 0.4 V −0.2 −0.2 mA ICCH VCC = MAX 18 18 mA ICCL VCC = MAX 60 60 mA ‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. § All typical values are at VCC = 5 V, and TA = 25°C. The SN74LS16 is obsolete and is no longer supplied.

/C0083/C0078/C0053/C0052/C0076/C0083/C0048/C0054/C0044 /C0083/C0078/C0055/C0052/C0076/C0083/C0048/C0054/C0044 /C0083/C0078/C0055/C0052/C0076/C0083/C0049/C0054 /C0072/C0069/C0088 /C0073/C0078/C0086/C0069/C0082/C0084/C0069/C0082 /C0066/C0085/C0070/C0070/C0069/C0082/C0083/C0047/C0068/C0082/C0073/C0086/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0079/C0080/C0069/C0078/C0262/C0067/C0079/C0076/C0076/C0069/C0067/C0084/C0079/C0082 /C0072/C0073/C0071/C0072/C0262/C0086/C0079/C0076/C0084/C0065/C0071/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SDLS020E − MAY 1990 − REVISED FEBRUARY 2004

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

switching characteristics, VCC = 5 V, TA = 25°C (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS MIN MAX UNIT tPLH A Y R L = 110 Ω, C L = 15 pF 7 15 ns tPHL A Y R L = 110 Ω, C L = 15 pF 10 20 ns The SN74LS16 is obsolete and is no longer supplied.

NOTES: A. C L includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent. C. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. D. S1 and S2 are closed for tPLH , tPHL , tPHZ , and tPLZ ; S1 is open and S2 is closed for tPZH ; S1 is closed and S2 is open for tPZL . E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples. F. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω, tr ≤ 1.5 ns, tf ≤ 2.6 ns. G. The outputs are measured one at a time, with one input transition per measurement. Figure 1. Load Circuits and Voltage Waveforms

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 5962-9861701Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 5962-9861701QCA ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type SN54LS06J ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type SN74LS06D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS06DBLE OBSOLETE SSOP DB 14 TBD Call TI Call TI SN74LS06DBR ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS06DBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS06DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS06DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS06DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS06DRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS06DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS06N ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74LS06NE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74LS06NSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS06NSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS06NSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS16D OBSOLETE SOIC D 14 TBD Call TI Call TI SN74LS16DR OBSOLETE SOIC D 14 TBD Call TI Call TI SN74LS16N OBSOLETE PDIP N 14 TBD Call TI Call TI SNJ54LS06FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type SNJ54LS06J ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. PACKAGE OPTION ADDENDUM www.ti.com 9-Oct-2007 Addendum-Page 1

Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 9-Oct-2007 Addendum-Page 2

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LS06DBR SSOP DB 14 2000 346.0 346.0 33.0 SN74LS06DR SOIC D 14 2500 346.0 346.0 33.0 SN74LS06NSR SO NS 14 2000 346.0 346.0 33.0 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 Pack Materials-Page 2

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 4040065 /E 12/01

28 PINS SHOWN

8,20 7,40 0,55 0,95 0,25 12,90 12,30 10,50 8,50 Seating Plane 9,907,90 10,50 9,90 0,38 5,60 5,00 0,22 A 2016 6,506,50 0,05 MIN 5,905,90 DIM A MAX A MIN PINS ** 2,00 MAX 6,90 7,50 0,65 M0,15 0°–/C02578° 0,10 0,09 0,25 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150

MLCC006B – OCTOBER 1996 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 4040140/D 10/96

28 TERMINAL SHOWN

B 0.358 (9,09) MAX (11,63) 0.560 (14,22) 0.560 0.458 0.858 (21,8) 1.063 (27,0) (14,22) ANO. OF MINMAX 0.358 0.660 0.761 0.458 0.342 (8,69) MIN (11,23) (16,26) 0.640 0.739 0.442 (9,09) (11,63) (16,76) 0.962 1.165 (23,83) 0.938 (28,99) 1.141 (24,43) (29,59) (19,32)(18,78) 0.020 (0,51) TERMINALS 0.080 (2,03) 0.064 (1,63) (7,80) 0.307 (10,31) 0.406 (12,58) 0.495 (12,58) 0.495 (21,6) 0.850 (26,6) 1.047 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.035 (0,89) 0.010 (0,25) 121314151618 17 432 0.020 (0,51) 0.010 (0,25) 12826 27 B SQ A SQ 0.055 (1,40) 0.045 (1,14) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004

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