74LS123

DM74LS123 FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

I DC triggered from active-HIGH transition or active-LOW transition inputs I Retriggerable to 100% duty cycle I Compensated for VCC and temperature variations I Triggerable from CLEAR input I DTL, TTL compatible I Input clamp diodes Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table H = HIGH Logic Level L = LOW Logic Level X = Can Be Either LOW or HIGH ↑ = Positive Going Transition ↓ = Negative Going Transition /c12 = A Positive Pulse /c13 = A Negative Pulse Order Number Package Number Package Description DM74LS123M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS123SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS123N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Inputs Outputs CLEAR A B Q Q LX X L H XH X L H XX L L H HL ↑ /c12/c13 H ↓ H /c12/c13 ↑ LH /c12/c13

www.fairchildsemi.com 4 DM74LS123 Absolute Maximum Ratings(Note 1) Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Note 2: TA = 25°C and VCC = 5V.

Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted) Note 3: All typicals are at VCC = 5V, TA = 25°C. Note 4: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 5: Quiescent ICC is measured (after clearing) with 2.4V applied to all clear and A inputs, B inputs grounded, all outputs OPEN, CEXT = 0.02 µF, and REXT = 25 kΩ . Note 6: ICC is measured in the triggered state with 2.4V applied to all clear and B inputs, A inputs grounded, all outputs OPEN, CEXT = 0.02 µF, and REXT = 25 kΩ . Note 7: With all outputs OPEN and 4.5V applied to all data and clear inputs, ICC is measured after a momentary ground, then 4.5V is applied to the clock. Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range 0°C to +70°C Storage Temperature −65°C to +150°C Symbol Parameter Min Nom Max Units V CC Supply Voltage 4.75 5 5.25 V VIH HIGH Level Input Voltage 2 V VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −0.4 mA IOL LOW Level Output Current 8 mA tW Pulse Width A or B HIGH 40 (Note 2) A or B LOW 40 ns Clear LOW 40 R EXT External Timing Resistor 5 260 k Ω C EXT External Timing Capacitance No Restriction µF C WIRE Wiring Capacitance at REXT /CEXT Terminal 50 pF TA Free Air Operating Temperature 0 70 °C Symbol Parameter Conditions Min Typ Max Units (Note 3) VI Input Clamp Voltage V CC = Min, II = −18 mA −1.5 V VOH HIGH Level V CC = Min, IOH = Max 2.7 3.4 V Output Voltage V IL = Max, VIH = Min VOL LOW Level V CC = Min, IOL = Max 0.35 0.5 Output Voltage V IL = Max, VIH = Min V IOL = 4 mA, VCC = Min 0.25 0.4 II Input Current @ Max Input Voltage VCC = Max, VI = 7V 0.1 mA IIH HIGH Level Input Current V CC = Max, VI = 2.7V 20 µA IIL LOW Level Input Current V CC = Max, VI = 0.4V −0.4 mA IOS Short Circuit Output Current V CC = Max (Note 4) −20 −100 mA ICC Supply Current V CC = Max (Note 5)(Note 6)(Note 7) 12 20 mA

5 www.fairchildsemi.com DM74LS123 Switching Characteristics at VCC = 5V and TA = 25°C Symbol Parameters R L = 2 kΩ Units From (Input) C L = 15pF C L = 15pF To (Output) C EXT = 0 pF, REXT = 5 kΩ C EXT = 1000 pF, REXT = 10 kΩ Min Max Min Max tPLH Propagation Delay Time A to Q 33 ns LOW-to-HIGH Level Output tPLH Propagation Delay Time B to Q 44 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time A to Q 45 ns HIGH-to-LOW Level Output tPHL Propagation Delay Time B to Q 56 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time Clear to Q 45 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time Clear to Q 27 ns HIGH-to-LOW Level Output tWQ(Min) Minimum Width of Pulse A or B to Q 200 ns at Output Q tW(out) Output Pulse Width A or B to Q 4 5 µs

www.fairchildsemi.com 6 DM74LS123 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A

7 www.fairchildsemi.com DM74LS123 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D

www.fairchildsemi.com 8 DM74LS123 Dual Retriggerable One-Shot with Clear and Complementary Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com