74HC595D

74HC595D TGS | Alldatasheet

Document overview

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• PDF pages: 9

Technical content

Features

• Low quiescent current: 80µA maximum
• Low input current: 1µA maximum
• 8-bit serial-in, parallel-out shift register with storage
• Wide operating voltage range: 2V–6V
• Cascadable
• Shift register has direct clear
• Guaranteed shift frequency: DC to 30 MHz
• Package: SOP16(74HC595D), TSSOP16(74HC595V), DIP16(74HC595P) Connection Diagram 16Q Q Q Q Q Q Q Q GND VC C SER G RCK SCK SCLR A B C D E F G H H 74HC595 SOP16(74HC595D), TSSOP16(74HC595V), DIP16(74HC595P) TIGER ELECTRONIC CO.,LTD

Rev 2.2 2013-11-21 Pin Function Pin Name I/O Description 15，1～7 QA ～QH O 8 bit 3-STATE Output 8，16 GND ，VCC － Grond, Supply

9 Q’H O Serial Output

10 SCLR I Shift Register cleared

11 SCK I Shift Register clocked

12 RCK I Output Register clocked

13 G I Output state control

14 SER I Data input

RCK SCK SCLR G Description X X X H QA to QH = 3-STATE X X L L Shift Register cleared, Q’H =0 X ↑ H L Shift Register clocked,QN= Qn-1，Q0= SER ↑ X H L Contents of Shift Register transferred to output latches

Rev 2.2 2013-11-21 Logic Diagram QD R QD QD R QD QD R QD QD R QD QD R QD QD R QD QD R QD QD R QD 910 14 15Q Q Q Q Q Q Q Q Q SCK SCLR SER RCK G A B C D E F G H PARALLEL DATA OUTPUTS SERIAL DAT A OUTPUT

Rev 2.2 2013-11-21 Timing Diagram Absolute Maximum Ratings Parameter Symbol Scope Unit Supply V oltage V CC -0.5 ～7.0 V DC Input V oltage V IN -1.5 ～VCC +1.5 V DC Output V oltage V OUT -0.5 ～VCC +0.5 V DC Output Current I OUT ±35 mA DC VCC or GND Current I CC ±70 mA Power Dissipation P D 600 mW Storage Temperature Range T STG -65 ～150 ℃ Recommended Operating Conditions Parameter Symbol Condition Min Max Unit Supply Voltage V CC 2 6 V DC Input or Output Voltage V IN ，VOUT 0 V CC V Input Rise or Fall Times t r , tf VCC =2.0V 1000 ns VCC =4.5V 500 VCC =6.0V 400 Operating Temperature Range T A -40 +85 ℃

Rev 2.2 2013-11-21

Electrical Characteristics

Symbol Parameter Condition VCC TA=25℃ TA=25 to 85℃ TA=-55 to 125℃ Unit typ Guaranteed Limits VIH Minimum High Level Input V oltage 2V 1.5 1.5 1.5 V 4.5V 3.15 3.15 3.15 6V 4.2 4.2 4.2 VIL Maximum Low Level Input V oltage 2V 0.5 0.5 0.5 V 4.5V 1.35 1.35 1.35 6V 1.8 1.8 1.8 VOH Minimum High Level Output V oltage VIN = VIH or VIL ︱IOUT ︱≤20μA 2V 2.0 1.9 1.9 1.9 6V 6 5.9 5.9 5.9 QH VIN = VIH or VIL ︱IOUT ︱≤4.0mA ︱IOUT ︱≤5.2mA V 6V 5.2 5.48 5.34 5.2 QA to QH VIN = VIH or VIL ︱IOUT ︱≤6.0mA ︱IOUT ︱≤7.8mA V VOL Maximum LOW Level Output V oltage VIN = VIH or VIL ︱IOUT ︱≤20μA 2V 0 0.1 0.1 0.1 V 4.5V 0 0.1 0.1 0.1 6V 0 0.1 0.1 0.1 QH VIN = VIH or VIL ︱IOUT ︱≤4.0mA ︱IOUT ︱≤5.2mA V 6V 0.2 0.26 0.33 0.4 QA to QH VIN = VIH or VIL ︱IOUT ︱≤6.0mA ︱IOUT ︱≤7.8mA V 6V 0.2 0.26 0.33 0.4 IIN Maximum Input Current VIN = VCC or GND 6V ±0.1 ±1.0 ±1.0 μA IOZ Maximum 3-STATE Output Leakage VOUT = VCC or GND G = VIH ICC Maximum Quiescent Supply Current VIN = VCC or GND IOUT= 0μA 6V 8.0 80 160 μA

Rev 2.2 2013-11-21 AC Characteristics (VCC =5V，TA =25℃，tr=tf =6ns) Symbol Parameter Condition Typ Guaranteed Limit Unit fMAX Maximum Operating Frequency of SCK 50 30 MHz tPHL t PLH Maximum Propagation Delay, SCK to QH’ CL =45pF 12 20 ns tPHL t PLH Maximum Propagation Delay, RCK to QA thru QH CL =45pF 18 30 ns tPZH t PZL Maximum Output Enable Time from G to QA thru QH RL=1kΩ CL =45pF 17 28 ns tPHZ t PLZ Maximum Output Disable Time from G to QA to QH RL=1kΩ CL =5pF 15 25 ns tS Minimum Setup Time from SER to SCK 20 ns tS Minimum Setup Time from SCLR to SCK 20 ns tS Minimum Setup Time from SCK to RCK 40 ns tH Minimum Hold Time from SER to SCK 0 ns tW Minimum Pulse Width of SCK or RCK 16 ns AC Characteristics (VCC =2.0～6.0V，CL =50pF，tr=tf =6ns) Symb ol Parameter Condition VCC TA=25℃ TA=25 to 85℃ TA=-55 to 125℃ Unit Typ Guaranteed Limit fMAX Maximum Operating Frequency CL =50pF 2V 10 6 4.8 4.0 MHz4.5V 45 30 24 20 6V 50 35 28 24 tPHL tPLH Maximum Propagation Delay from SCK to QH CL =50pF CL =150pF 2V 58 210 265 315 ns 2V 83 294 367 441 CL =50pF CL =150pF 4.5V 14 42 53 63 ns 4.5V 17 58 74 88 CL =50pF CL =150pF 6V 10 36 45 54 ns 6V 14 50 63 76 tPHL tPLH Maximum Propagation Delay from RCK to QA thru QH CL =50pF CL =150pF 2V 70 175 220 265 ns 2V 105 245 306 368 CL =50pF CL =150pF 4.5V 21 35 44 53 ns 4.5V 28 49 61 74 CL =50pF 6V 18 30 37 45 ns

Rev 2.2 2013-11-21 CL =150pF 6V 26 42 53 63 tPHL tPLH ximum Propagation delay from SCLR to QH 2V 175 221 261 ns 4.5V 36 44 52 6V 30 37 44 tPZH tPZL Maximum Output Enable from G to QA thru QH RL =1kΩ CL =50pF CL =150pF 2V 75 175 220 265 ns 2V 100 245 306 368 CL =50pF CL =150pF 4.5V 15 35 44 53 ns 4.5V 20 49 61 74 CL =50pF CL =150pF 6V 13 30 37 45 ns 6V 17 42 53 63 tPHZ tPLZ Maximum Output Disable Time from G to QA thru QH RL =1kΩ CL =50pF 2V 75 175 220 265 ns 4.5V 15 35 44 53 6V 13 30 37 45 tS Minimum Setup Time from SER to SCK 2V 100 125 150 ns 4.5V 20 25 30 6V 17 21 25 tR Minimum Removal Time from SCLR to SCK 2V 50 63 75 ns 4.5V 10 13 15 6V 9 11 13 tS Minimum Setup Time from SCK to RCK 2V 100 125 150 ns 4.5V 20 25 30 6V 17 21 26 tH Minimum Hold Time SER to SCK 2V 5 5 5 ns 4.5V 5 5 5 6V 5 5 5 tW Minimum Pulse Width of SCK or SCLR 2V 30 80 100 120 ns 4.5V 9 16 20 24 6V 8 14 18 22 tr t f Maximum Input Rise and Fall Time, Clock 2V 1000 1000 1000 ns 4.5V 500 500 500 6V 400 400 400 tTHL tTLH Maximum Output 2V 25 60 75 90 ns 4.5V 7 12 15 18

Rev 2.2 2013-11-21 Rise and Fall Time QA–QH 6V 6 10 13 15 tTHL tTLH Maximum Output Rise & Fall Time QH 2V 75 95 110 ns 4.5V 15 19 22 6V 13 16 19 CPD Power Dissipation Capacitance, Outputs Enabled G =VCC G =GND pF 150 CIN Maximum Input Capacitance 5 10 10 10 pF COUT Maximum Output Capacitance 15 20 20 20 pF

Rev 2.2 2013-11-21 Package Dimension SOP16 3.95±0.10 10.00±0.10 0.406±0.1 1.27 0.20±0.10 1.45±0.10 0.203 6.04±0.20 0.55±0.20 Uni t：mm 2°～8° TSSOP16 0.65 4.40±0.10 6.40±0.20 Uni t：mm0.10 0°～8° 0.90～1.05 0.05～0.15 0.20～0.28 DIP16 2.54 7.62 19.10±0.20 3.80±0.20 6.35±0.20 Unit：mm 3.30±0.30 0.46±0.10 1.52 3.30±0.20