74FCT534 NSC | Alldatasheet
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Y ICC and I OZ reduced to 40.0 mA and g2.5 mA respectively Y NSC 54/74FCT534 is pin and functionally equivalent to IDT 54/74FCT534 Y Edge-triggered D-type inputs Y Buffered positive edge-triggered clock Y Input clamp diodes to limit bus reflections Y TTL/CMOS input and output level compatible Y IOL e 48 mA Y CMOS power levels Y ESD immunity t 4k Vt y p Logic Symbols TL/F/10665–1 IEEE/IEC TL/F/10665–2 Connection Diagram Pin Assignment for DIP and SOIC TL/F/10665–3 Pin Names Description D0 –D7 Data Inputs CP Clock Pulse Input OE TRI-STATE Output Enable Input O0 –O7 Complementary TRI-STATE Outputs TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. FACTTM and GTO TM are trademarks of National Semiconductor Corporation. C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
The ’FCT534 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE complementary outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE ) LOW, the contents of the eight flip-flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. Logic Diagram TL/F/10665–5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Function Table Inputs Output CP OE D O L LH L L LL H LL XO 0 XH X Z H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial L e LOW-to-HIGH Clock Transition Z e High Impedance O0 e Value stored from previous clock cycle
Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Terminal Voltage with Respect to GND (V TERM) 74FCT b0.5V to a7.0V Temperature Under Bias (T BIAS) 74FCT b55§Ct o a125§C Storage Temperature (T STG) 74FCT b55§Ct o a125§C DC Output Current (I OUT) 120 mA Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. Exposure to absolute maximum rating conditions for extended periods may affect reliability. The databook specifications should be met, without exception, to ensure that the system design is reli- able over its power supply, temperature, and output/input loading variables. Recommended Operating Conditions Supply Voltage (V CC) 74FCT 4.75V to 5.25V Input Voltage 0V to V CC Output Voltage 0V to V CC Operating Temperature (T A) 74FCT b0§Ct o a70§C Junction Temperature (T J) PDIP 140 §C Note: All commercial packaging is not recommended for applications requir- ing greater than 2000 temperature cycles from b40§Ct o a125§C. DC Characteristics for ’FCTA Family Devices Typical values are at V CC e 5.0V, 25 §C ambient and maximum loading. For test conditions shown as Max, use the value specified for the appropriate device type: Com: V CC e 5.0V g5%, T A e 0§Ct o a70§C; V HC e VCC b 0.2V. Symbol Parameter 74FCTA Units Conditions Min Typ Max VIH Minimum High Level 2.0 VInput Voltage VIL Maximum Low Level 0.8 VInput Voltage IIH Input High Current 5.0 mA VCC e Max V I e VCC 5.0 V I e 2.7V (Note 2) IIL Input Low Current b5.0 mA VCC e Max V I e 0.5V (Note 2) b5.0 V I e GND IOZ Maximum TRI-STATE Current 2.5 V CC e Max V O e VCC 2.5 mA VO e 2.7V (Note 2) b2.5 V O e 0.5V (Note 2) b2.5 V O e GND VIK Clamp Diode Voltage b0.7 b1.2 V V CC e Min; I N eb 18 mA IOS Short Circuit Current b60 b120 mA V CC e Max (Note 1); V O e GND VOH Minimum High Level 2.8 3.0 V CC e 3V; V IN e 0.2V or V HC;I OH eb 32 mA Output Voltage VHC VCC V VCC e Min I OH eb 300 mA 2.4 4.3 V IN e VIH or V IL IOH eb 15 mA VOL Maximum Low Level GND 0.2 V CC e 3V; V IN e 0.2V or V HC;I OL e 300 mA Output Voltage GND 0.2 V VCC e Min I OL e 300 mA 0.3 0.5 V IN e VIH or V IL IOL e 48 mA
DC Characteristics for ’FCT Family Devices (Continued) Typical values are at V CC e 5.0V, 25 §C ambient and maximum loading. For test conditions shown as Max, use the value specified for the appropriate device type: Com: V CC e 5.0V g5%, T A e 0§Ct o a70§C; V HC e VCC b 0.2V. Symbol Parameter 74FCT Units Conditions Min Typ Max ICC Maximum Quiescent V CC e Max Supply Current 1.0 40.0 mAV IN t VHC,V IN s 0.2V fI e 0 DICC Quiescent Supply Current; 0.5 2.0 mA VCC e Max TTL Inputs HIGH V IN e 3.4V (Note 3) ICCD Dynamic Power V CC e Max V IN t VHC Supply Current (Note 4) 0.15 0.25 mA/MHz Outputs Open V IN s 0.2V OE e GND One Input Toggling 50% Duty Cycle IC Total Power Supply V CC e Max V IN t VHC Current (Note 6) 1.5 4.0 Outputs Open V IN s 0.2V fCP e 10 MHz OE e GND fI e 5 MHz VIN e 3.4V 1.8 6.0 One Bit Toggling VIN e GND mA 50% Duty Cycle (Note 5) V IN t VHC VCC e Max V IN s 0.2V 3.0 7.8 Outputs Open OE e GND fCP e 10 MHz fI e 2.5 MHz VIN e 3.4V 5.0 16.8 Eight Bits Toggling VIN e GND 50% Duty Cycle VH Input Hysteresis 200 mVon Clock Only Note 1: Maximum test duration not to exceed one second, not more than one output shorted at one time. Note 2: This parameter guaranteed but not tested. Note 3: Per TTL driven input (V IN e 3.4V); all other inputs at V CC or GND. Note 4: This parameter is not directly testable, but is derived for use in Total Power Supply calculations. Note 5: Values for these conditions are examples of the I CC formula. These limits are guaranteed but not tested. Note 6: IC e IQUIESCENT a IINPUTS a IDYNAMIC IC e ICC a DICC DHNT a ICCD (fCP/2 a fI NI) ICC e Quiescent Current DICC e Power Supply Current for a TTL High Input (V IN e 3.4V) DH e Duty Cycle for TTL inputs High NT e Number of Inputs at D H ICCD e Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP e Clock Frequency for Register Devices (Zero for Non-Register Devices) fI e Input Frequency NI e Numbers of Inputs at f I All currents are in milliamps and all frequencies are in megahertz.
TA ea 25§CT A,V CC e Com VCC e 5.0V C L e 50 pF Typ Min Max(Note 1) tPLH Propagation Delay 6.5 1.5 10.0 nstPHL CP to O n tPZH Output Enable 9.0 1.5 12.5 nstPZL Time tPHZ Output Disable 6.0 1.5 8.0 nstPLZ Time ts Set Up Time High or Low 1.0 2.0 nsDn to CP th Hold Time High or Low 0.5 1.5 nsDn to CP tw CP Pulse Width 4.0 7.0 nsHigh or Low Note 1: Minimum limits guaranteed but not tested on propagation delays. Capacitance TA ea 25§C, f I e 1.0 MHz Symbol Parameter Typ Max Units Conditions CIN Input Capacitance 6 10 pF V IN e 0V COUT Output Capacitance 8 12 pF V OUT e 0V Note: This parameter is measured at characterization but not tested. COUT for 74FCT only.
Ordering Information
The device number is used to form part of a simplified purchasing code where a package type and temperature range are defined as follows: 74FCT 534 P C QR Temperature Range Family Special Variations 74FCT e Commercial TTL-Compatible X e Devices shipped in 13 × reels QR e Commercial grade deviceDevice Type with burn-in Package Code Temperature RangeP e Plastic DIP C e Commercial (0 §Ct o a70§C)S e Small Outline (SOIC)
Physical Dimensions inches (millimeters) 20-Lead Small Outline Integrated Circuit (S)
74FCT534 Octal D Flip-Flop with TRI-STATE Outputs Physical Dimensions inches (millimeters) (Continued) 20-Lead Plastic Dual-In-Line Package (P) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.
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