74FST3384 ONSEMI | Alldatasheet

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Technical content

 Semiconductor Components Industries, LLC, 2002 May, 2002 – Rev. 4

1 Publication Order Number:

The ON Semiconductor 74FST3384 is a 10–bit low power bus switch. The device is CMOS TTL compatible when operating between 4 and 5.5 V olts. The device exhibits extremely low RON and adds nearly zero propagation delay. The device adds no noise or ground bounce to the system.

  • R ON 4 Typical
  • Less Than 0.25 ns–Max Delay Through Switch
  • Nearly Zero Standby Current
  • No Circuit Bounce
  • Control Inputs are TTL/CMOS Compatible
  • Pin–For–Pin Compatible With QS3384, FST3384, CBT3384
  • All Popular Packages: SOIC–24, TSSOP–24, QSOP–24

Figure 1. 24–Lead Pinout

Description

OE 1, OE2 A0–A9 Pin Bus Switch Enable Bus A B0–B9 Bus B V CC OE 2 OE GND NOTE: H = HIGH Voltage Level, L = LOW Voltage Level L OE 1 B 5–B 9 A5–A9 Function Connect H A0–A4L HIGH–Z State Connect L HIGH–Z StateH A5–A9 Connect H HIGH–Z StateH HIGH–Z State Disconnect Device Package Shipping

ORDERING INFORMATION

74FST3384DW SO–24 48 Units/Rail 74FST3384DWR2 SO–24 74FST3384DT TSSOP–24

2500 Units/Reel

96 Units/Rail

A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week 74FST3384DTR2 TSSOP–24 2500 Units/Reel 74FST3384QS QSOP–24 96 Units/Rail 74FST3384QSR QSOP–24 2500 Units/Reel TSSOP–24 DT SUFFIX CASE 948H QSOP–24 QS SUFFIX CASE 492B SO–24 DW SUFFIX CASE 751E FST3384 AWLYWW MARKING DIAGRAMS FST 3384 ALYW FST3384 AWLYYWW http://onsemi.com

Figure 2. Logic Diagram

http://onsemi.com MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage 0.5 to 7.0 V VI DC Input Voltage 0.5 to 7.0 V VO DC Output Voltage 0.5 to 7.0 V IIK DC Input Diode Current V I GND 50 mA IOK DC Output Diode Current V O GND 50 mA IO DC Output Sink Current 128 mA ICC DC Supply Current per Supply Pin 100 mA IGND DC Ground Current per Ground Pin 100 mA TSTG Storage Temperature Range 65 to 150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature Under Bias 150 °C JA Thermal Resistance SOIC TSSOP QSOP 125 170 200 °C/W MSL Moisture Sensitivity Level 1 FR Flammability Rating Oxygen Index: 28 to 34 UL 94 V–0 @ 0.125 in VESD ESD Withstand Voltage Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3) 2000 200 N/A V ILATCH–UP Latch–Up Performance Above V CC and Below GND at 85°C (Note 4) 500 mA Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum–rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 1. Tested to EIA/JESD22–A114–A. 2. Tested to EIA/JESD22–A115–A. 3. Tested to JESD22–C101–A. 4. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit VCC Supply Voltage Operating, Data Retention Only 4.0 5.5 V VI Input Voltage (Note 5) 0 5.5 V VO Output Voltage (HIGH or LOW State) 0 5.5 V TA Operating Free–Air Temperature 40 85 °C t/V Input Transition Rise or Fall Rate Switch Control Input Switch I/O V CC = 5.0 V 0.5 V 0 DC ns/V 5. Unused control inputs may not be left open. All control inputs must be tied to a high or low logic input voltage level.

http://onsemi.com DC ELECTRICAL CHARACTERISTICS VCC TA = 40C to 85C Symbol Parameter Conditions VCC (V) Min Typ* Max Unit VIK Clamp Diode Resistance IIN = 18mA 4.5 1.2 V VIH High–Level Input Voltage 4.0 to 5.5 2.0 V VIL Low–Level Input Voltage 4.0 to 5.5 0.8 V II Input Leakage Current 0 VIN 5.5 V 5.5 1.0 A IOZ OFF–STATE Leakage Current 0 A, B VCC 5.5 1.0 A R ON Switch On Resistance (Note 6)VIN = 0 V, IIN = 64 mA 4.5 4 7 VIN = 0 V, IIN = 30 mA 4.5 4 7 VIN = 2.4 V, IIN = 15 mA 4.5 8 15 VIN = 2.4 V, IIN = 15 mA 4.0 11 20 ICC Quiescent Supply Current VIN = VCC or GND, IOUT = 0 5.5 3 A ICC Increase In ICC per Input One input at 3.4 V, Other inputs at VCC or GND 5.5 2.5 mA *Typical values are at VCC = 5.0 V and TA = 25°C. 6. Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins. AC ELECTRICAL CHARACTERISTICS TA = 40C to 85C C L = 50 pF, RU = RD = 500 VCC = 4.5–5.5 V VCC = 4.0 V Symbol Parameter Conditions Min Max Min Max Unit tPHL , tPLH Prop Delay Bus to Bus (Note 7) VI = OPEN 0.25 0.25 ns tPZH , tPZL Output Enable Time, IOE to Bus A, B VI = OPEN for tPZH 1.0 5.7 6.2 ns tPHZ , tPLZ Output Disable Time, IOE to Bus A, B VI = OPEN for tPHZ 1.0 5.2 5.5 ns 7. This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). CAPACITANCE (Note 8) Symbol Parameter Conditions Typ Max Unit C IN Control Pin Input Capacitance VCC = 5.0 V 6 pF C I/O Port Input/Output Capacitance VCC , OE = 5.0 V 13 pF 8. TA = 25°C, f = 1 MHz, Capacitance is characterized but not tested.

http://onsemi.com PACKAGE DIMENSIONS SO–24 D SUFFIX CASE 751E–04 ISSUE E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. –A– –B– P12X D24X 1324 M0.010 (0.25) B M SAM0.010 (0.25) B ST –T– G22X SEATING PLANE K C R X 45 M F J DIM MIN MAX MIN MAX INCHESMILLIMETERS A 15.25 15.54 0.601 0.612 B 7.40 7.60 0.292 0.299 C 2.35 2.65 0.093 0.104 D 0.35 0.49 0.014 0.019 F 0.41 0.90 0.016 0.035 G 1.27 BSC 0.050 BSC J 0.23 0.32 0.009 0.013 K 0.13 0.29 0.005 0.011 M 0 8 0 8 P 10.05 10.55 0.395 0.415 R 0.25 0.75 0.010 0.029

http://onsemi.com PACKAGE DIMENSIONS TSSOP–24 DT SUFFIX CASE 948H–01 ISSUE A DIM MIN MAX MIN MAX INCHESMILLIMETERS A 7.70 7.90 0.303 0.311 B 4.30 4.50 0.169 0.177 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.27 0.37 0.011 0.015 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0 8 0 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. SU0.15 (0.006) T 2X L/2 SUM0.10 (0.004) V ST L –U– SEATING PLANE 0.10 (0.004) –T– ÇÇÇ ÇÇÇ SECTION N–N DETAIL E J K ÉÉ ÉÉ DETAIL E F M –W– 0.25 (0.010) 1324 121 PIN 1 IDENT. HG A D C B SU0.15 (0.006) T –V– 24X REFK N N

http://onsemi.com PACKAGE DIMENSIONS QSOP–24 QS SUFFIX CASE 492B–01 ISSUE O MIN MILLIMETERS G R –B– –A– L M0.25 (0.010) T U –T– SEATING PLANE K D24 PLC M0.25 (0.010) T BAS S V N M F 8 PL DETAIL E DETAIL E H x 45 RAD. MOLD PIN DIM MAX MINMAX INCHES A 8.56 8.740.337 0.344 B 3.81 3.990.150 0.157 C 1.55 1.730.061 0.068 D 0.20 0.310.008 0.012 F 0.41 0.890.016 0.035 G 0.64 BSC0.025 BSC H 0.20 0.460.008 0.018 J 0.249 0.1910.0098 0.0075 K 0.10 0.250.004 0.010 L 5.84 6.200.230 0.244 M 0 8 0 N 0 7 0 7 P 0.69 0.940.027 0.037 Q 0.89 DIA0.035 DIA R 0.89 1.140.035 0.045 U 0.89 1.140.035 0.045 V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. THE BOTTOM PACKAGE SHALL BE BIGGER THAN THE TOP PACKAGE BY 4 MILS (NOTE: LEAD SIDE ONLY). BOTTOM PACKAGE DIMENSION SHALL FOLLOW THE DIMENSION STATED IN THIS DRAWING. 4. PLASTIC DIMENSIONS DOES NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 6 MILS PER SIDE. 5. BOTTOM EJECTOR PIN WILL INCLUDE THE COUNTRY OF ORIGIN (COO) AND MOLD CAVITY I.D. 0 8 0 MARK Q P 0.013 X 0.005 DP. MAX RAD. 0.005–0.010 TYP J ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION JAPAN : ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone : 81–3–5740–2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. 74FST3384/D Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone : 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800–282–9855 Toll Free USA/Canada