74FR245 FAIRCHILD | Alldatasheet

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■ Non-inverting buffers ■ Bidirectional data path ■ A and B output sink capability of 64 mA, source capability of 15 mA ■ Guaranteed pin-to-pin skew Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Connection Diagram Truth Table H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Order Number Package Number Package Description 74FR245SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74FR245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74FR245PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Pin Names Description OE Output Enable Input (Active-LOW) T/R Transmit/Receive Input A0–A7 Side A Inputs or 3-STATE Outputs B0–B7 Side B Inputs or 3-STATE Outputs Inputs Output OE T/R L L Bus B Data to Bus A L H Bus A Data to Bus B H X High Z State

www.fairchildsemi.com 2 74FR245 Logic Diagram

3 www.fairchildsemi.com 74FR245 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C VCC Pin Potential to Ground Pin −0.5V to +7.0V Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Current Applied to Output in LOW State (Max) twice the rated I OL (mA) ESD Last Passing Voltage (Min) 4000V Free Air Ambient Temperature 0 °C to +70°C Supply Voltage +4.5V to +5.5V Symbol Parameter Min Typ Max Units VCC Conditions VIH Input HIGH Voltage 2.0 V Recognized HIGH Signal VIL Input LOW Voltage 0.8 V Recognized LOW Signal VCD Input Clamp Diode Voltage −1.2 V Min I IN = −18 mA VOH Output HIGH Voltage 2.4 V Min I OH = −3 mA (An, Bn)

2.0 V Min I OH = −15 mA (An, Bn)

VOL Output LOW Voltage 0.55 V Min I OL = 64 mA (An, Bn) IIH Input HIGH Current 5 µAM a x VIN = 2.7V (OE, T/R) IBVI Input HIGH Current 7 µAM a x V IN = 7.0V (OE, T/R) Breakdown Test IBVIT Input HIGH Current 100 µAM a x V IN = 5.5V (An, Bn) Breakdown Test (I/O) IIL Input LOW Current −250 µAM a x VIN = 0.5V (OE, T/R) VID Input Leakage Test 4.75 V 0.0 I ID = 1.9 µA All Other Pins Grounded IOD Output Circuit 3.75 µA0 . 0 VIOD = 150 mV Leakage Current All Other Pins Grounded IIH + IOZH Output Leakage Current 25 µAM a x V OUT = 2.7V (An, Bn) IIL + IOZL Output Leakage Current −150 µAM a x V OUT = 0.5V (An, Bn) IOS Output Short-Circuit Current −100 −225 mA Max V OUT = 0.0V (An, Bn) ICEX Output HIGH Leakage Current 50 µAM a x V OUT = VCC (An, Bn) IZZ Bus Drainage Test 100 µA0 . 0 V OUT = 5.25V (An, Bn) ICCH Power Supply Current 55 75 mA Max All Outputs HIGH ICCL Power Supply Current 75 110 mA Max All Outputs LOW ICCZ Power Supply Current 55 75 mA Max Outputs 3-STATE C IN Input Capacitance 8.0 pF 5.0 OE , T/R 17.0 pF 5.0 A n, Bn

www.fairchildsemi.com 4 74FR245 Extended AC Characteristics Note 3: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase, i.e., all LOW-to- HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc. Note 4: These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load. This specification pertains to single output switching only. Note 5: Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specifi- cation applies to any outputs switching HIGH-to-LOW (tOSHL ), LOW-to-HIGH (tOSLH ), or HIGH-to-LOW and/or LOW-to-HIGH (tOST ). Specifications guaran- teed with all outputs switching in phase. Symbol Parameter TA = +25°CT A = 0°C to +70°C Units VCC = +5.0V V CC = +5.0V C L = 50 pF C L = 50 pF Min Typ Max Min Max ns ns ns Symbol Parameter T A = 0°C to +70°CT A = 0°C to +70°CU n i t s VCC = +5.0V V CC = +5.0V C L = 50 pF C L = 250 pF Eight Outputs Switching (Note 4) (Note 3) Min Max Min Max tPLH Propagation Delay 1.0 5.9 2.5 7.5 ns tPHL An to Bn or Bn to An 1 . 05 . 92 . 57 . 5 tPZH Output Enable Time 2.5 11.9 ns tPZL 2.5 11.9 tPHZ Output Disable Time 1.3 6.5 ns tPLZ 1.3 6.5 tOSHL Pin to Pin Skew 1.7 ns (Note 5) for HL Transitions tOSLH Pin to Pin Skew 1.0 ns (Note 5) for LH Transitions tOST Pin to Pin Skew 3.3 ns (Note 5) for HL/LH Transitions

5 www.fairchildsemi.com 74FR245 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D

www.fairchildsemi.com 6 74FR245 Octal Bidirectional Transceiver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com