74FCT162501ATPACT

CY74FCT16501T TI | Alldatasheet

Document overview

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Technical content

Features

• FCT-E speed at 3.8 ns
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for significantly improved noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6 mil pitch) and SSOP (25-mil pitch) packages
• Industrial temperature range of-40˚C to +85˚C CC = 5V– 10% CY74FCT16501T Features:
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25˚C CY74FCT162501T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical V OLP (ground bounce) <0.6V at VCC = 5V, TA = 25˚C CY74FCT162H501T Features:
• Bus hold retains last active state
• Eliminates the need for external pull-up or pull-down resistors Functional Description These 18-bit universal bus transceivers can be operated in transparent, latched or clock modes by combining D-type latches and D-type flip-flops. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock inputs (CLKAB and CLKBA). For A-to-B data flow, the device operates in transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CLKAB is held at a HIGH or LOW logic level. If LEAB is LOW, the A bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CLKAB. OEAB performs the output enable function on the B port. Data flow from B-to-A is similar to that of A-to-B and is controlled by OEBA, LEBA, and CLKBA. The output buffers are designed with a power-off disable feature to allow live insertion of boards. The CY74FCT16501T is ideally suited for driving high-capacitance loads and low-impedance backplanes. THE CY74FCT162501T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162501T is ideal for driving transmission lines. The CY74FCT162H501T is a 24-mA balanced output part, that has “bus hold” on the data inputs. The device retains the input’s last state whenever the input goes to high impedance. This eliminates the need for pull-up/down resistors and prevents floating inputs. GND Functional Block Diagram PinConfiguration OEAB SSOP/TSSOP Top View LEAB A 1 GND GND VCC GND GND FCT16501-1 A 2 A 3 A 4 A 5 A 6 A 7 A 8 A 9 GND GND A 10 A 11 A 12 VCC A 13 A 14 A 15 A 16 A 17 A 18 OEBA LEBA GND CLKAB GND VCC GND B10 B11 B12 B13 B14 B15 VCC B16 B17 B18 CLKBA OEAB CLKBA LEBA OEBA CLKAB LEAB C D C D C D A 1 C D TO 17 OTHER CHANNELS FCT16501-2

Maximum Ratings [6, 7] (Above which the useful life may be impaired. For user guidelines, not tested.) Ambient Temperature with DC Output Current (per MIL-STD-883, Method 3015) Notes: 1. On the 74FCT162H501T these pins have bus hold. 2. A-to-B data flow is shown. B-to-A data flow is similar but usesOEBA, LEBA, and CLKBA. 3. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High-impedance = LOW-to-HIGH Transition 4. Output level before the indicated steady-state input conditions were established. 5. Output level before the indicated steady-state input conditions were established, provided that CLKAB was HIGH before LEAB went LOW. 6. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-airtemperature range. 7. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V CC or ground. Pin Description Name Description OEAB A-to-B Output Enable Input OEBA B-to-A Output Enable Input (Active LOW) LEAB A-to-B Latch Enable Input LEBA B-to-A Latch Enable Input CLKAB A-to-B Clock Input CLKBA B-to-A Clock Input A A-to-B Data Inputs or B-to-A Three-State Outputs[1] B B-to-A Data Inputs or A-to-B Three-State Outputs [1] Function Table[2, 3] Inputs Outputs OEAB LEAB CLKAB A B L X X X Z H H X L L H H X H H H L L L H L H H H L L X B[4] H L H X B[5] Operating Range Range Ambient Temperature VCC Industrial -40°C to +85°C 5V – 10%

Electrical CharacteristicsOver the Operating Range Parameter Description Test Conditions Min. Typ.[8] Max. Unit VIH Input HIGH Voltage 2.0 V VIL Input LOW Voltage 0.8 V VH Input Hysteresis[9] 100 mV VIK Input Clamp Diode Voltage VCC =Min., IIN=-18 mA -0.7 -1.2 V IIH Input HIGH Current Standard VCC =Max., VI=V CC –1 mA Bus Hold –100 IIL Input LOW Current Standard VCC =Max., VI=GND –1 mA Bus Hold –100 mA IBBH IBBL Bus Hold Sustain Current on Bus Hold Input[10] VCC =Min., VI=2.0V -50 mA VI=0.8V +50 mA IBHHO IBHLO Bus Hold Overdrive Current on Bus Hold In- put[10] VCC =Max., VI=1.5V TBD mA IOZH High Impedance Output Current (Three-State Output pins) VCC =Max., VOUT =2.7V –1 mA IOZL High Impedance Output Current (Three-State Output pins) VCC =Max., VOUT =0.5V –1 mA IOS Short Circuit Current[11] VCC =Max., VOUT =GND -80 -140 -200 mA IO Output Drive Current[11] VCC =Max., VOUT =2.5V -50 -180 mA IOFF Power-Off Disable VCC =0V, VOUT £4.5V[12] –1 mA Output Drive Characteristics for CY74FCT16501T Parameter Description Test Conditions Min. Typ.[8] Max. Unit VOH Output HIGH Voltage VCC =Min., IOH =-3 mA 2.5 3.5 V VCC =Min., IOH =-15 mA 2.4 3.5 VCC =Min., IOH =-32 mA 2.0 3.0 VOL Output LOW Voltage VCC =Min., IOL =64 mA 0.2 0.55 V Output Drive Characteristics for CY74FCT162501T, CY74FCT162H501T Parameter Description Test Conditions Min. Typ.[8] Max. Unit IODL Output LOW Current[11] VCC =5V, VIN=V IH or VIL, VOUT =1.5V 60 115 150 mA IODH Output HIGH Current[11] VCC =5V, VIN=V IH or VIL, VOUT =1.5V -60 -115 -150 mA VOH Output HIGH Voltage VCC =Min., IOH =-24 mA 2.4 3.3 V VOL Output LOW Voltage VCC =Min., IOL =24 mA 0.3 0.55 V Notes: 8. Typical values are at VCC = 5.0V, TA= +25˚C ambient. 9. This parameter is specified but not tested. 10. Pins with bus hold are described in Pin Description. 11. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, I OS tests should be performed last. 12. Tested at +25˚C.

Capacitance[9](TA = +25˚C, f = 1.0 MHz) Parameter Description Test Conditions Typ.[8] Max. Unit C IN Input Capacitance VIN = 0V 4.5 6.0 pF C OUT Output Capacitance VOUT = 0V 5.5 8.0 pF Power Supply Characteristics Sym. Parameter Test Conditions[13] Min. Typ.[8] Max. Unit ICC Quiescent Power Supply Current VCC =Max. VIN<0.2V VIN>VCC -0.2V — 5 500 mA DICC Quiescent Power Supply Current TTL inputs HIGH VCC = Max., VIN =3.4V[14] — 0.5 1.5 mA ICCD Dynamic Power Supply Current [15] VCC =Max., Outputs Open OEAB= OEBA=V CC or GND One Input Toggling, 50% Duty Cycle VIN=VCC or VIN=GND — 75 120 mA/ MHz IC Total Power Supply Current [16] VCC =Max., Outputs Open f0 =10MHz (CLKAB) 50% Duty Cycle OEAB= OEBA=V CC LEAB = GND, One Bit Toggling f 1 = 5MHz, 50% Duty Cycle VIN=VCC or VIN=GND — 0.8 1.7 mA VIN=3.4V or VIN=GND — 1.3 3.2 VCC =Max., Outputs Open f0 = 10MHz (CLKAB) 50% Duty Cycle OEAB= OEBA=V CC LEAB=GND Eighteen Bits Toggling f 1=2.5MHz, 50% Duty Cycle VIN=VCC or VIN=GND — 3.8 6.5[17] VIN=3.4V or VIN=GND — 8.5 20.8[17] Notes: 13. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 14. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 15. This parameter is not directly testable, but is derived for use in Total Power Supply. 16. IC =I QUIESCENT + IINPUTS + IDYNAMIC IC =I CC +DICC D H N T+ICCD (f0/2 + f1N 1) ICC = Quiescent Current with CMOS input levels DICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) D H = Duty Cycle for TTL inputs HIGH N T = Number of TTL inputs at DH ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) f0 = Clock frequency for registered devices, otherwise zero f1 = Input signal frequency N 1 = Number of inputs changing at f1 All currents are in milliamps and all frequencies are in megahertz. 17. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.

Switching CharacteristicsOver the Operating Range[18] CY74FCT16501AT CY74FCT162501AT CY74FCT162501CT CY74FCT162H501CT CY74FCT16501ET CY74FCT162501ET CY74FCT162H501ET Fig. fMAX CLKAB or CLKBA frequency[20] — 150 — 150 — 150 MHz — tPLH tPHL Propagation Delay A to B or B to A tPLH tPHL Propagation Delay LEBA to A, LEAB to B tPLH tPHL Propagation Delay CLKBA to A, CLKAB to B tPZH tPZL Output Enable Time OEBA to A, OEAB to B tPHZ tPLZ Output Disable Time OEBA to A, OEAB to B tSU Set-Up Time, HIGH or LOW A to CLKAB, B to CLKBA tH Hold Time HIGH or LOW A to CLKAB, B to CLKBA 0 — 0 — 0 — ns 4 tSU Set-Up Time, HIGH or LOW A to LEAB, B to LEBA Clock LOW Clock HIGH tH Hold Time, HIGH or LOW, A to LEAB, B to LEBA tW LEAB or LEBA Pulse Width HIGH [20] tW CLKAB or CLKBA Pulse Width HIGH or LOW [20] tSK(O) Output Skew[21] — 0.5 — 0.5 — 0.5 ns — Notes: 18. Minimum limits are specified, but not tested, on propagation delays. 19. See “Parameter Measurement Information” in the General Information section. 20. This parameter is guaranteed but not tested. 21. Skew between any two outputs of the same package switching in the same direction. This parameter ensured by design.

(ns) Ordering Code Package Name Package Type Operating Range

3.8 CY74FCT16501ETPACT Z56 56-Lead (240-Mil) TSSOP Industrial

CY74FCT16501ETPVC/PVCT O56 56-Lead (300-Mil) SSOP

5.1 CY74FCT16501ATPVC/PVCT O56 56-Lead (300-Mil) SSOP Industrial

(ns) Ordering Code Package Name Package Type Operating Range 3.8 74FCT162501ETPACT Z56 56-Lead (240-Mil) TSSOP Industrial CY74FCT162501ETPVC O56 56-Lead (300-Mil) SSOP 74FCT162501ETPVCT O56 56-Lead (300-Mil) SSOP 4.6 74FCT162501CTPACT Z56 56-Lead (240-Mil) TSSOP Industrial CY74FCT162501CTPVC O56 56-Lead (300-Mil) SSOP 74FCT162501CTPVCT O56 56-Lead (300-Mil) SSOP 5.1 74FCT162501ATPACT Z56 56-Lead (240-Mil) TSSOP Industrial CY74FCT162501ATPVC O56 56-Lead (300-Mil) SSOP 74FCT162501ATPVCT O56 56-Lead (300-Mil) SSOP Speed (ns) Ordering Code Package Name Package Type Operating Range 3.8 74FCT162H501ETPACT Z56 56-Lead (240-Mil) TSSOP Industrial 74FCT162H501ETPVC/PVCT O56 56-Lead (300-Mil) SSOP 4.6 74FCT162H501CTPACT Z56 56-Lead (240-Mil) TSSOP Industrial 74FCT162H501CTPVC/PVCT O56 56-Lead (300-Mil) SSOP

56-Lead Shrunk Small Outline PackageO56 56-Lead Thin Shrunk Small Outline PackageZ56

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