74FCT162244T_09 IDT | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 7

Technical content

MILITARY AND INDUSTRIAL TEMPERATURE RANGES IDT54/74FCT162244T/AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER SEPTEMBER 2009 IDT54/74FCT162244T/AT/CT/ET MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 16-BIT BUFFER/LINE DRIVER DESCRIPTION: The FCT162244T 16-Bit Buffer/Line Driver is for bus interface or signal buffering applications requiring high speed and low power dissipation. These devices have a flow through pin organization, and shrink packaging to simplify board layout. All inputs are designed with hysteresis for improved noise margin. The three-state controls allow independent 4-bit, 8-bit or combined 16-bit operation. These parts are plug in replacements for 54/74ABT16244 where higher speed, lower noise or lower power dissipation levels are desired. The FCT162244T has balanced output current levels and current limiting resistors. These offer low ground bounce, minimal undershoot, and controlled output fall times, reducing the need for external series terminating resistors while still providing very high speed operation for loads of less than 200pF. 3OE 3A1 3A2 3A3 3A4 3Y1 3Y2 3Y3 3Y4 1Y1 1Y2 1Y3 1Y4 1A1 1A2 1A3 1A4 1OE 4OE 4A1 4A2 4A3 4A4 4Y1 4Y2 4Y3 4Y4 2OE 2A1 2A2 2A3 2A4 2Y1 2Y2 2Y3 2Y4 The IDT logo is a registered trademark of Integrated Device Technology, Inc. © 2009 Integrated Device Technology, Inc. DSC-5461/9 FEATURES:

  • 0.5 MICRON CMOS Technology  High-speed, low-power CMOS replacement for ABT functions  Typical t SK(o) (Output Skew) < 250ps  Low input and output leakage ≤≤≤≤≤ 1µA (max.)  ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)  Balanced Output Drivers: – ±24mA (industrial) – ±16mA (military)  Reduced system switching noise  Typical V OLP (Output Ground Bounce) < 0.6V at V CC = 5V, TA = 25°C  Available in the following packages: – Industrial: SSOP, TSSOP – Military: CERPACK FUNCTIONAL BLOCK DIAGRAM

MILITARY AND INDUSTRIAL TEMPERATURE RANGES IDT54/74FCT162244T/AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER SSOP/ TSSOP/ CERPACK TOP VIEW PIN CONFIGURATION 1Y1 GND 1Y3 VCC GND 3Y2 GND VCC GND 1Y2 1Y4 2Y1 2Y2 2Y3 2Y4 3Y1 3Y3 3Y4 4Y1 4Y3 4Y4 4Y2 4OE 1A1 1A2 GND 1A3 1A4 VCC 2A1 2A2 2A3 2A4 3A1 3A2 3A3 3A4 VCC 4A1 4A3 4A4 4A2 GND GND GND 2OE 3OE 1OE Symbol Description Max Unit VTERM(2) Terminal Voltage with Respect to GND –0.5 to +7 V VTERM(3) Terminal Voltage with Respect to GND –0.5 to V CC+0.5 V TSTG Storage Temperature –65 to +150 ° C IOUT DC Output Current –60 to +120 mA ABSOLUTE MAXIMUM RATINGS(1)(1)(1)(1)(1) NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXXT Output and I/O terminals. 3. Output and I/O terminals terminals for FCT162XXXT and FCT166XXXT. Symbol Parameter (1) Conditions Typ. Max. Unit CIN Input Capacitance V IN = 0V 3.5 6 pF COUT Output Capacitance V OUT = 0V 3.5 8 pF CAPACITANCE (TA = +25°C, F = 1.0MHz) NOTE: 1. This parameter is measured at characterization but not tested. Pin Names Description xOE 3-State Output Enable Inputs (Active LOW) x A x Data Inputs x Y x 3-State Outputs PIN DESCRIPTION NOTE: 1. H = HIGH Voltage Level X = Don’t Care L = LOW Voltage Level Z = High-Impedance Inputs Outputs xOE xAx xYx LL L LH H HX Z FUNCTION TABLE(1)

MILITARY AND INDUSTRIAL TEMPERATURE RANGES IDT54/74FCT162244T/AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER Symbol Parameter Test Conditions (1) Min. Typ.(2) Max. Unit VIH Input HIGH Level Guaranteed Logic HIGH Level 2 — — V VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V IIH Input HIGH Current (Input pins)(5) VCC = Max. V I = VCC —— ±1µ A Input HIGH Current (I/O pins)(5) —— ±1 IIL Input LOW Current (Input pins)(5) VI = GND — — ±1µ A Input LOW Current (I/O pins)(5) —— ±1 IOZH High Impedance Output Current V CC = Max. V O = 2.7V — — ±1µ A IOZL (3-State Output pins)(5) VO = 0.5V — — ±1 VIK Clamp Diode Voltage V CC = Min., IIN = –18mA — –0.7 –1.2 V IOS Short Circuit Current V CC = Max., V O = GND(3) –80 –140 –250 mA VH Input Hysteresis — — 100 — mV ICCL Quiescent Power Supply Current V CC = Max. — 5 500 µ A ICCH VIN = GND or VCC ICCZ DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: T A = –40°C to +85°C, VCC = 5.0V ±10%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10% Symbol Parameter Test Conditions(1) Min. Typ. (2) Max. Unit IODL Output LOW Current V CC = 5V, VIN = VIH or VIL, VO = 1.5V(3) 60 115 200 mA IODH Output HIGH Current V CC = 5V, VIN = VIH or VIL, VO = 1.5V(3) –60 –115 –200 mA VOH Output HIGH Voltage V CC = Min I OH = –16mA MIL 2.4 3.3 — V VIN = VIH or VIL IOH = –24mA COM'L VOL Output LOW Voltage V CC = Min I OH = 16mA MIL — 0.3 0.55 V VIN = VIH or VIL IOH = 24mA COM'L OUTPUT DRIVE CHARACTERISTICS NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable dev ice type. 2. Typical values are at V CC = 5.0V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Duration of the condition can not exceed one second. 5. This test limit for this parameter is ±5µA at T A = –55°C.

MILITARY AND INDUSTRIAL TEMPERATURE RANGES IDT54/74FCT162244T/AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit ΔICC Quiescent Power Supply Current V CC = Max. — 0.5 1.5 mA TTL Inputs HIGH V IN = 3.4V(3) ICCD Dynamic Power Supply V CC = Max. V IN = VCC — 60 100 µ A / Current(4) Outputs Open V IN = GND MHz xOE = GND One Input Toggling 50% Duty Cycle IC Total Power Supply Current(6) VCC = Max. V IN = VCC — 0.6 1.5 mA Outputs Open V IN = GND fi = 10MHz 50% Duty Cycle V IN = 3.4V — 0.9 2.3 xOE = GND V IN = GND One Bit Toggling VCC = Max. V IN = VCC — 2.4 4.5 (5) Outputs Open V IN = GND fi = 2.5MHz 50% Duty Cycle V xOE = GND V IN = GND Sixteen Bits Toggling NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable dev ice type. 2. Typical values are at V CC = 5.0V, +25°C ambient. 3. Per TTL driven input (V IN = 3.4V). All other inputs at V CC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the I CC formula. These limits are guaranteed but not tested. 6. I C = IQUIESCENT + IINPUTS + IDYNAMIC IC = I CC + ΔICC DHNT + I CCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (I CCL, ICCH and I CCZ) ΔICC = Power Supply Current for a TTL High Input (V IN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at D H ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at f CP fi = Input Frequency Ni = Number of Inputs at fi POWER SUPPLY CHARACTERISTICS

MILITARY AND INDUSTRIAL TEMPERATURE RANGES IDT54/74FCT162244T/AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER SWITCHING CHARACTERISTICS OVER OPERATING RANGE NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 74FCT162244AT 74FCT162244CT 74FCT162244ET tPHL xAx to xYx R L = 500Ω tPZL tPLZ tSK(o) Output Skew (3) — 0.5 — 0.5 — 0.5 ns 54FCT162244T 54FCT162244AT 54FCT162244CT tPHL xAx to xYx R L = 500Ω tPZL tPLZ tSK(o) Output Skew (3) — 0.5 — 0.5 — 0.5 ns

MILITARY AND INDUSTRIAL TEMPERATURE RANGES IDT54/74FCT162244T/AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER Pulse Generator RT D.U.T. VCC VIN CL VOUT 50pF 500Ω 500Ω 7.0V 1.5V 1.5V 1.5V 1.5V DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL tSU tH tREM tSU tH PRESET CLEAR CLOCK ENABLE ETC. HIGH-LOW-HIGH PULSE LOW-HIGH-LOW PULSE tW 1.5V 1.5V SAME PHASE INPUT TRANSITION 1.5V 1.5V VOH tPLH OUTPUT OPPOSITE PHASE INPUT TRANSITION 1.5V tPLH tPHL tPHL VOL CONTROL INPUT 1.5V 3.5V OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED SWITCH OPEN VOL 0.3V 0.3V tPLZtPZL tPZH tPHZ 3.5V 1.5V 1.5V ENABLE DISABLE VOH TEST CIRCUITS AND WAVEFORMS Propagation Delay Test Circuit for All Outputs Enable and Disable Times Set-up, Hold, and Release Times Pulse Width Test Switch Open Drain Disable Low Closed Enable Low All Other Tests Open SWITCH POSITION DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to Z OUT of the Pulse Generator. NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

MILITARY AND INDUSTRIAL TEMPERATURE RANGES IDT54/74FCT162244T/AT/CT/ET FAST CMOS 16-BIT BUFFER/LINE DRIVER

ORDERING INFORMATION

Temp. Range XXXX Device Type XX Package X Process PVG PAG Industrial Options Shrink Small Outline Package - Green Thin Shrink Small Outline Package - Green 16-Bit Buffer/Line Driver 55C to +125C 40C to +85C

162 Double-Density, 5 Volt, Balanced Drive

E Military Options CERPACK Blank B Industrial MIL-STD-883, Class B FCT XXX Family 244T 244AT 244CT 244ET CORPORATE HEADQUARTERS for SALES: for Tech Support: 6024 Silver Creek Valley Road 800-345-7015 or 408-284-8200 logichelp@idt.com San Jose, CA 95138 fax: 408-284-2775 www.idt.com Datasheet Document History 09/06/09 Pg.6 Updated the ordering information by removing the "IDT" notation and non RoHS part.