54F821SDM NSC | Alldatasheet
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Y Direct replacement for AMD’s Am29821 Commercial Military Package Package DescriptionNumber 74F821SPC N24C 24-Lead (0.300 × Wide) Molded Dual-In-Line 54F821SDM (Note 2) J24F 24-Lead (0.300 × Wide) Ceramic Dual-In-Line 74F821SC (Note 1) M24B 24-Lead (0.300 × Wide) Molded Small Outline, JEDEC 54F821FM (Note 2) W24C 24-Lead Cerpack 54F821LM (Note 2) E28A 24-Lead Ceramic Leadless Chip Carrier, Type C Note 1: Devices also available in 13 × reel. Use suffix e SCX. Note 2: Military grade device with environmental and burn-in processing. Use suffix e SDMQB, FMQB and LMQB. Logic Symbols Connection Diagrams TL/F/9595–1 IEEE/IEC TL/F/9595–5 Pin Assignment for DIP, SOIC and Flatpak TL/F/9595–2 Pin Assignment for LCC TL/F/9595–3 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.
Pin Names Description U.L. Input I IH/IIL HIGH/LOW Output I OH/IOL D0 –D9 Data Inputs 1.0/1.0 20 mA/b0.6 mA OE Output Enable 1.0/1.0 20 mA/b0.6 mATRI-STATE Input CP Clock Input 1.0/1.0 20 mA/b0.6 mA O0 –O9 TRI-STATE Outputs 150/40 (33.3) b3.0 mA/24 mA (20 mA) Functional Description The ’F821 consists of ten D-type edge-triggered flip-flops. This device has TRI-STATE true outputs for bus systems organized in a broadside pinning. The buffered Clock (CP) and buffered Output Enable (OE ) are common to all flip- flops. The flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH CP transition. With the OE LOW the con- tent of the flip-flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. Function Table Inputs Internal Output Function OE CP D Q O H H X NC Z Hold H L X NC Z Hold H L L H Z Load H L H L Z Load L L L H L Data Available L L H L H Data Available L H X NC NC No Change in Data L L X NC NC No Change in Data L e LOW Voltage Level H e HIGH Voltage Level X e Immaterial Z e High Impedance L e LOW-to-HIGH Transition NC e No Change Logic Diagram TL/F/9595–4 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Storage Temperature b65§Ct o a150§C Ambient Temperature under Bias b55§Ct o a125§C Junction Temperature under Bias b55§Ct o a175§C Plastic b55§Ct o a150§C VCC Pin Potential to Ground Pin b0.5V to a7.0V Input Voltage (Note 2) b0.5V to a7.0V Input Current (Note 2) b30 mA to a5.0 mA Voltage Applied to Output in HIGH State (with V CC e 0V) Standard Output b0.5V to V CC TRI-STATE Output b0.5V to a5.5V Current Applied to Output in LOW State (Max) twice the rated I OL (mA) Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Recommended Operating Conditions Free Air Ambient Temperature Military b55§Ct o a125§C Commercial 0 §Ct o a70§C Supply Voltage Military a4.5V to a5.5V Commercial a4.5V to a5.5V Symbol Parameter 54F/74F Units V CC Conditions Min Typ Max VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal VCD Input Clamp Diode Voltage b1.2 V Min I IN eb 18 mA VOH Output HIGH 54F 10% V CC 2.5 I OH eb 1m A Voltage 54F 10% V CC 2.4 I OH eb 3m A 74F 10% V CC 2.5 V Min IOH eb 1m A 74F 10% V CC 2.4 I OH eb 3m A 74F 5% V CC 2.7 I OH eb 1m A 74F 5% V CC 2.7 I OH eb 3m A VOL Output LOW 54F 10% V CC 0.5 V Min IOL e 20 mA Voltage 74F 10% V CC 0.5 I OL e 24 mA IIH Input HIGH Current 54F 20.0 mA Max VIN e 2.7V 74F 5.0 IBVI Input HIGH Current 54F 100 mA Max VIN e 7.0V Breakdown Test 74F 7.0 ICEX Output HIGH 54F 250 mA Max VOUT e VCC Leakage Current 74F 50 VID Input Leakage Test 74F 4.75 V 0.0 IID e 1.9 mA, All Other Pins Grounded IOD Output Leakage 74F 3.75 mA 0.0 VIOD e 150 mV Circuit Current All Other Pins Grounded IIL Input LOW Current b0.6 mA Max V IN e 0.5V IOZH Output Leakage Current 50 mA Max V OUT e 2.7V IOZL Output Leakage Current b50 mA Max V OUT e 0.5V IOS Output Short-Circuit Current b60 b150 mA Max V OUT e 0V ICCZ Power Supply Current 78 100 mA Max V O e HIGH Z
TA ea 25§C TA,V CC e Mil T A,V CC e ComSymbol Parameter V CC ea 5.0V CL e 50 pF C L e 50 pF Units CL e 50 pF Min Typ Max Min Max Min Max fmax Maximum Clock Frequency 100 150 60 70 MHz AC Operating Requirements 74F 54F 74F Symbol Parameter TA ea 25§C TA,V CC e Mil T A,V CC e Com UnitsVCC ea 5.0V Min Max Min Max Min Max ts(H) Setup Time, HIGH or LOW 2.5 4.0 3.0 ts(L) D n to CP 2.5 4.0 3.0 ns th(H) Hold Time, HIGH or LOW 2.5 2.5 2.5 th(L) D n to CP 2.5 2.5 2.5
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 74F 821 S C X Temperature Range Family Special Variations 74FeCommercial FAST QB e Military grade device with 54FeMilitary FAST environmental and burn-in processingDevice Type X e Devices ship in 13 × reel Package Code Temperature RangeSP e Slim Plastic DIP CeCommercial (0 §Ct o a70§C)SD e Slim Ceramic DIP MeMilitary ( b55§Ct o a125§C)F e Flatpak L e Leadless Chip Carrier (LCC) S e Small Outline (SOIC)
Physical Dimensions inches (millimeters) 28-Lead Ceramic Leadless Chip Carrier (L) 24-Lead (0.300 × Wide) Ceramic Dual-In-Line Package (SD)
Physical Dimensions inches (millimeters) (Continued) 24-Lead (0.300 × Wide) Molded Small Outline Package, JEDEC (S) 24-Lead (0.300 × Wide) Molded Dual-In-Line Package (SP)
54F/74F821 10-Bit D-Type Flip-Flop Physical Dimensions inches (millimeters) (Continued) 24-Lead Ceramic Flatpak (F) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor National Semiconductores National Semiconductor Corporation GmbH Japan Ltd. Hong Kong Ltd. Do Brazil Ltda. (Australia) Pty, Ltd. 2900 Semiconductor Drive Livry-Gargan-Str. 10 Sumitomo Chemical 13th Floor, Straight Block, Rue Deputado Lacorda Franco Building 16 P.O. Box 58090 D-82256 F 4urstenfeldbruck Engineering Center Ocean Centre, 5 Canton Rd. 120-3A Business Park Drive Santa Clara, CA 95052-8090 Germany Bldg. 7F Tsimshatsui, Kowloon Sao Paulo-SP Monash Business Park Tel: 1(800) 272-9959 Tel: (81-41) 35-0 1-7-1, Nakase, Mihama-Ku Hong Kong Brazil 05418-000 Nottinghill, Melbourne TWX: (910) 339-9240 Telex: 527649 Chiba-City, Tel: (852) 2737-1600 Tel: (55-11) 212-5066 Victoria 3168 Australia Fax: (81-41) 35-1 Ciba Prefecture 261 Fax: (852) 2736-9960 Telex: 391-1131931 NSBR BR Tel: (3) 558-9999 Tel: (043) 299-2300 Fax: (55-11) 212-1181 Fax: (3) 558-9998 Fax: (043) 299-2500 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.