74F756

74F756 PHILIPS | Alldatasheet

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/C0109 /C0110 /C0114 74F756 Octal inverter buffer (open-collector) 74F757 Octal buffer (open-collector) 74F760 Octal buffer (open-collector) Product specification IC15 Data Handbook

1989 Nov 27

Philips Semiconductors Product specification 74F756/74F757/74F760Buffers 74F756 Octal Inverter Buffer (Open Collector) 74F757 Octal Buffer (Open Collector) 74F760 Octal Buffer (Open Collector)

21989 Nov 27 853–0270 98220

FEATURES

• Octal bus interface
• Open collector versions of 74F240, 74F241 and 74F244

DESCRIPTION

The 74F756, 74F757 and 74F760 are octal buffers that are ideal for driving bus lines of buffer memory address registers. The 74F756 is the open collector version of 74F240, 74F757 is the open collector version of 74F241 and 74760 is the open collector version of 74F244. These devices feature two Output Enables. OE a and OEb (or OEb for the 74F757), each controlling four of the outputs. TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F756 9.0ns 40mA 74F757 9.0ns 45mA 74F760 9.0ns 45mA

ORDERING INFORMATION

DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C PKG DWG # 20–pin plastic DIP N74F756N, N74F757AN, N74F760N SOT146-1 20–pin plastic SOL N74F756D, N74F757AD, N74F760D SOT163-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW Ian, Ibn Data inputs 1.0/1.67 20µA/1.0mA OE a, OEb Output enable input (active Low) 1.0/1.67 20µA/0.2mA OEb Output enable input (active High 74F757) 1.0/1.67 20µA/1.0mA Yan, Ybn Data outputs (74F757, 74F760) OC/106.7 OC/64mA Yan, Ybn Data outputs (74F756) OC/106.7 OC/64mA Notes: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the Low state. OC=Open Collector

Philips Semiconductors Product specification 74F756/74F757/74F760Buffers

1989 Nov 27 3

PIN CONFIGURATION for 74F756 10 11 SF00320 OE a Ia0 Yb0 Ia1 Yb1 Ia2 Yb2 Ia3 Yb3 GND VCC OE b Ya0 Ib0 Ya1 Ib1 Ya2 Ib2 Ya3 Ib3 LOGIC SYMBOL for 74F756 VCC = Pin 20 GND = Pin 10 SF00321 OEa OEb 2 4 6 8 17 15 13 11 1 8 1 6 1 4 1 2 3579 Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3 Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3 IEC/IEEE SYMBOL for 74F756 EN1 EN2 SF01246 LOGIC DIAGRAM for 74F756 VCC = Pin 20 GND = Pin 10 SF01247 Yb0 Yb1 Yb2 Yb3 Ya0 Ya1 Ya2 Ya3 Ib0 Ib1 Ib2 Ib3 OE b Ia0 Ia1 Ia2 Ia3 OE b FUNCTION TABLE for 74F756 INPUTS OUTPUTS OE a Ia OE b Ib Ya Yb L L L L H H L H L H L L H X H X H (off) H (off) H = High voltage level L = Low voltage level X = Don’t care

Philips Semiconductors Product specification 74F756/74F757/74F760Buffers

1989 Nov 27 4

PIN CONFIGURATION for 74F757 10 11

20 V CC

VCC = Pin 20 GND = Pin 10 2 4 6 8 17 15 13 11 Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3 18 16 14 12 3 5 7 9 Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3 SF01250 IEC/IEEE SYMBOL for 74F757 SF01249 EN1 EN2 LOGIC DIAGRAM for 74F757 VCC = Pin 20 GND = Pin 10 Ia0 Ia1 Ia2 Ia3 OE a Ya0 Ya1 Ya2 Ya3 Ib0 Ib1 Ib2 Ib3 OEb Yb0 Yb1 Yb2 Yb3 SF01251 FUNCTION TABLE for 74F757 INPUTS OUTPUTS OE a Ia OEb Ib Ya Yb L L H L L L L H H H H H H X L X H (off) H (off) H = High voltage level L = Low voltage level X = Don’t care

Philips Semiconductors Product specification 74F756/74F757/74F760Buffers

1989 Nov 27 5

PIN CONFIGURATION for 74F760 10 11

20 VCCOE a

VCC = Pin 20 GND = Pin 10 2 4 6 8 17 15 13 11 Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3 18 16 14 12 3 5 7 9 Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3 SF01254 IEC/IEEE SYMBOL for 74F760 EN1 EN2 SF01253 LOGIC DIAGRAM for 74F760 VCC = Pin 20 GND = Pin 10 Ia0 Ia1 Ia2 Ia3 OE a Ya0 Ya1 Ya2 Ya3 Ib0 Ib1 Ib2 Ib3 OE b Yb0 Yb1 Yb2 Yb3 SF01255 FUNCTION TABLE for 74F760 INPUTS OUTPUTS OE a Ia OE b Ib Ya Yb L L L L L L L H L H H H H X H X H (off) H (off) H = High voltage level L = Low voltage level X = Don’t care

Philips Semiconductors Product specification 74F756/74F757/74F760Buffers

1989 Nov 27 6

(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL PARAMETER RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to VCC V IOUT Current applied to output in Low output state 128 mA Tamb Operating free-air temperature range 0 to +70 °C Tstg Storage temperature range –65 to +150 °C RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS UNIT MIN NOM MAX VCC Supply voltage 4.5 5.0 5.5 V VIH High-level input voltage 2.0 V VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA VOH High-level output voltage 4.5 V IOL Low-level output current 64 mA Tamb Operating free-air temperature range 0 70 °C DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST LIMITS UNIT CONDITIONS 1 MIN TYP 2 MAX IOH High-level output current VCC = MIN, VIL = MAX, VIH = MIN, VOH = MAX 250 µA VOL Low-level output voltage VCC = MIN, V MAX IOL = 48MAX ±10%V CC 0.38 0.55 V VIL = MAX , VIH = MIN, IOL = 64mA ±5%V CC 0.42 0.55 V VIK Input clamp voltage VCC = MIN, II = IIK –0.73 –1.2 V II Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA IIH High-level input current VCC = MAX, VI = 2.7V 20 µA IIL Low-level input current VCC = MAX, VI = 0.5V –1.0 mA 74F756 ICCH 20 30 mA 74F756 ICCL 50 70 mA ICC Supply current (total) 74F757 ICCH VCC = MAX 30 40 mA ICC Supply current (total) 74F757 ICCL VCC = MAX 55 80 mA 74F760 ICCH 25 37 mA 74F760 ICCL 55 80 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C.

Philips Semiconductors Product specification 74F756/74F757/74F760Buffers

1989 Nov 27 7

AC ELECTRICAL CHARACTERISTICS LIMITS Tamb = +25°C Tamb = 0°C to +70°C SYMBOL PARAMETER TEST VCC = +5.0V VCC = +5.0V ± 10% UNIT CONDITION C L = 50pF, RL = 500Ω C L = 50pF, RL = 500Ω MIN TYP MAX MIN MAX tPLH tPHL Propagation delay Ian, Ibn to Yn 74F756 Waveform 1, 2 8.5 1.0 11.0 3.0 14.0 6.0 8.5 1.0 15.0 6.5 ns tPLH tPHL Propagation delay OE n to Yn 74F756 Waveform 1, 2 9.0 5.0 11.5 7.0 14.5 10.0 9.0 4.5 15.0 10.5 ns tPLH tPHL Propagation delay Ian, Ibn to Yn 74F757 Waveform 1, 2 7.5 3.0 10.5 5.5 13.5 8.5 7.5 3.0 14.0 9.0 ns tPLH tPHL Propagation delay OE a or OEb to Yn 74F757 Waveform 1, 2 9.0 4.5 10.5 7.0 15.0 10.0 8.5 4.0 16.0 10.5 ns tPLH tPHL Propagation delay Ian, Ibn to Yn 74F760 Waveform 1, 2 7.5 3.5 10.0 5.5 13.5 8.5 7.5 3.0 14.0 9.0 ns tPLH tPHL Propagation delay OE n to Yn 74F760 Waveform 1, 2 9.5 5.0 11.5 7.0 14.5 10.5 9.0 4.5 15.0 10.5 ns AC WAVEFORMS For all waveforms, VM = 1.5V. Ian, Ibn, OEn VM VM VMVM tPLHtPHL Yn SF01256 Waveform 1. Propagation Delay for Inverting Outputs Ian, Ibn, OE a, OEb VM VM VMVM tPHLtPLH Yn SF01257 Waveform 2. Propagation Delay for Non-invertIng Outputs TYPICAL PROPAGATION DELAYS VERSUS LOAD FOR OPEN COLLECTOR OUTPUTS 0 100 200 300 400 500 600 LOAD RESISTOR ( ) PROPAGATION DELAY (ns) tPLH tPHL SF01258 NOTE: When using open-collector parts, the value of the pull-up resistor greatly affects the value of the tPLH . For example, changing the pull-up resistor value from 500 to 100 will improve the tPLH up to 50% with only slight increase in the tPHL . However, if the pull-up resistor is changed, the user must make certain that the total IOL current through the resistor and the total IIL’s of the receivers do not exceed the IOL maximum specification.

Philips Semiconductors Product specification 74F756/74F757/74F760Buffers

1989 Nov 27 8

TEST CIRCUIT AND WAVEFORMS tw 90% VM 10% 90% VM 10% 90% VM 10% 90% VM 10% NEGATIVE PULSE POSITIVE PULSE tw AMP (V) tTHL (tf ) INPUT PULSE REQUIREMENTS rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns Input Pulse Definition VCC family 74F D.U.T.PULSE GENERATOR R LC LR T VIN VOUT Test Circuit for Open Collector Outputs DEFINITIONS: R L = Load resistor; see AC electrical characteristics for value. C L = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. R T = Termination resistance should be equal to ZOUT of pulse generators. tTHL (tf ) tTLH (tr ) tTLH (tr ) AMP (V) amplitude 3.0V 1.5V VM R L 7.0V SF00027

Philips Semiconductors Product specification 74F756, 74F757, 74F760 Buffers

1989 Nov 27 9

DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1

Philips Semiconductors Product specification 74F756, 74F757, 74F760 Buffers

1989 Nov 27 10

SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

Philips Semiconductors Product specification 74F756, 74F757, 74F760 Buffers

1989 Nov 27 11

Philips Semiconductors Product specification 74F756, 74F757, 74F760 Buffers yyyy mmm dd 12 Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors

811 East Arques Avenue

P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381  Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Date of release: 10-98 Document order number: 9397-750-05176 /C0109 /C0110 /C0114 Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Production Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Data sheet status [1] Please consult the most recently issued datasheet before initiating or completing a design.