54F544DM NSC | Alldatasheet

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Y Back-to-back registers for storage Y Separate controls for data flow in each direction Y A outputs sink 24 mA (20 mA Mil), B outputs sink 64 mA (48 mA Mil) Y 300 mil slim PDIP Commercial Military Package Package DescriptionNumber 74F544SPC N24C 24-Lead (0.300 × Wide) Molded Dual-In-Line 54F544DM (Note 2) J24A 24-Lead Ceramic Dual-In-Line 54F544SDM (Note 2) J24F 24-Lead (0.300 × Wide) Ceramic Dual-In-Line 74F544SC (Note 1) M24B 24-Lead (0.300 × Wide) Molded Small Outline, JEDEC 74F544MSA (Note 1) MSA24 24-Lead Molded Shrink Small Outline, EIAJ, Type II 54F544FM (Note 2) W24C 24-Lead Cerpack 54F544LM (Note 2) E28A 24-Lead Ceramic Leadless Chip Carrier, Type C Note 1: Devices also available in 13 × reel. Use suffix e SCX and MSAX. Note 2: Military grade device with environmental and burn-in processing. Use suffix e DMQB, FMQB and LMQB Logic Symbols TL/F/9555–2 IEEE/IEC TL/F/9555–1 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

DIP, SOIC and Flatpak TL/F/9555–3 Pin Assignment for LCC TL/F/9555–4 Unit Loading/Fan Out 54F/74F Pin Names Description U.L. Input I IH/IIL HIGH/LOW Output I OH/IOL OEAB A-to-B Output Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA OEBA B-to-A Output Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA CEAB A-to-B Enable Input (Active LOW) 1.0/2.0 20 mA/b1.2 mA CEBA B-to-A Enable Input (Active LOW) 1.0/2.0 20 mA/b1.2 mA LEAB A-to-B Latch Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA LEBA B-to-A Latch Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA A0 –A7 A-to-B Data Inputs or 3.5/1.083 70 mA/b650 mA B-to-A TRI-STATE Outputs 150/40(33.3) b3 mA/24 mA (20 mA) B0 –B7 B-to-A Data Inputs or 3.5/1.083 70 mA/b650 mA A-to-B TRI-STATE Outputs 600/106.6(80) b12 mA/64 mA (48 mA) Functional Description The ’F544 contains two sets of eight D-type latches, with separate input and output controls for each set. For data flow from A to B, for example, the A-to-B Enable (CEAB input must be LOW in order to enter data from A 0 –A7 or take data from B 0 –B7, as indicated in the Data I/O Control Table. With CEAB LOW, a LOW signal on the A-to-B Latch Enable (LEAB ) input makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the LEAB signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB and OEAB both LOW, the TRI-STATE É B output buffers are active and re- flect the data present at the output of the A latches. Control of data flow from B to A is similar, but using the CEBA LEBA and OEBA inputs. Data I/O Control Table Inputs Latch Status Output Buffers CEAB LEAB OEAB H X X Latched High Z X H X Latched Ð L L X Transparent Ð X X H Ð High Z L X L Ð Driving H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial A-to-B data flow shown; B-to-A flow control is the same, except using CEBA , LEBA and OEBA

TL/F/9555–5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Storage Temperature b65§Ct o a150§C Ambient Temperature under Bias b55§Ct o a125§C Junction Temperature under Bias b55§Ct o a175§C Plastic b55§Ct o a150§C VCC Pin Potential to Ground Pin b0.5V to a7.0V Input Voltage (Note 2) b0.5V to a7.0V Input Current (Note 2) b30 mA to a5.0 mA Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Voltage Applied to Output in HIGH State (with V CC e 0V) Standard Output b0.5V to V CC TRI-STATE Output b0.5V to a5.5V Current Applied to Output in LOW State (Max) twice the rated I OL (mA) Recommended Operating Conditions Free Air Ambient Temperature Military b55§Ct o a125§C Commercial 0 §Ct o a70§C Supply Voltage Military a4.5V to a5.5V Commercial a4.5V to a5.5V Symbol Parameter 54F/74F Units V CC Conditions Min Typ Max VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal VCD Input Clamp Diode Voltage b1.2 V Min IIN eb 18 mA, (except A n,B n) VOH Output HIGH 54F 10% V CC 2.5 I OH eb 1m A( A n) Voltage 54F 10% V CC 2.4 I OH eb 3m A( A n,B n) 54F 10% V CC 2.0 I OH eb 12 mA (B n) 74F 10% V CC 2.5 V Min IOH eb 1m A( A n) 74F 10% V CC 2.4 I OH eb 3m A( A n,B n) 74F 10% V CC 2.0 I OH eb 15 mA (B n) 74F 5% V CC 2.7 I OH eb 1m A( A n) 74F 5% V CC 2.7 I OH eb 3m A( A n,B n) VOL Output LOW 54F 10% V CC 0.5 I OL e 20 mA (A n) Voltage 54F 10% V CC 0.55 V Min IOL e 48 mA (B n) 74F 10% V CC 0.5 I OL e 24 mA (A n) 74F 10% V CC 0.55 I OL e 64 mA (B n) IIH Input HIGH 54F 20.0 mA Max VIN e 2.7V (except A n,B n) Current 74F 5.0 IBVI Input HIGH Current 54F 100 mA Max VIN e 7.0V (except A n,B n) Breakdown Test 74F 7.0 IBVIT Input HIGH Current 54F 1.0 mA Max VIN e 5.5V (A n,B n) Breakdown (I/O) 74F 0.5 ICEX Output HIGH 54F 250 mA Max VOUT e VCC (An,B n) Leakage Current 74F 250 VID Input Leakage 74F 4.75 V 0.0 IID e 1.9 mA Test All Other Pins Grounded IOD Output Leakage 74F 3.75 mA 0.0 VIOD e 150 mV Circuit Current All Other Pins Grounded IIL Input LOW Current b0.6 mA Max VIN e 0.5V (OEAB , OEBA ) b1.2 V IN e 0.5V (CEAB , CEBA ) IIH a IOZH Output Leakage Current 70 mA Max V OUT e 2.7V (A n,B n) IIL a IOZL Output Leakage Current b650 mA Max V OUT e 0.5V (A n,B n)

Symbol Parameter 54F/74F Units V CC Conditions Min Typ Max IOS Output Short-Circuit Current b60 b150 mA Max VOUT e 0V (A n) b100 b225 V OUT e 0V (B n) IZZ Bus Drainage Test 500 mA 0.0V V OUT e 5.25V (A n,B n) ICCH Power Supply Current 70 105 mA Max V O e HIGH ICCL Power Supply Current 85 130 mA Max V O e LOW ICCZ Power Supply Current 83 125 mA Max V O e HIGH Z 74F 54F 74F TA ea 25§C TA,V CC e Mil T A,V CC e ComSymbol Parameter V CC ea 5.0V CL e 50 pF C L e 50 pF Units CL e 50 pF Min Typ Max Min Max Min Max A n to B n or B n to A n CEBA or CEAB to A n or B n ns CEBA or CEAB to A n or B n AC Operating Requirements 74F 54F 74F Symbol Parameter TA ea 25§C TA,V CC e Mil T A,V CC e Com UnitsVCC ea 5.0V Min Max Min Max Min Max ts(H) Setup Time, HIGH or LOW 3.0 3.0 3.0 ts(L) A n or B n to LEBA or LEAB 3.0 3.0 3.0 ns th(H) Hold Time, HIGH or LOW 3.0 3.0 3.0 th(L) A n or B n to LEBA or LEAB 3.0 3.0 3.0 tw(L) Latch Enable, B to A 6.0 9.0 7.5 nsPulse Width, LOW

Ordering Information

The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 74F 544 S C X Temperature Range Family Special Variations 74F e Commercial QB e Military grade device with 54F e Military environmental and burn-in processingDevice Type X e Devices shipped in 13 × reel Package Code Temperature RangeSP e Slim Plastic DIP C e Commercial (0 §Ct o a70§C)D e Ceramic DIP M e Military ( b55§Ct o a125§C)SD e Slim Ceramic DIP F e Flatpak L e Leadless Chip Carrier (LCC) S e Small Outline (SOIC) MSA e Shrink Small Outline (SOIC) EIAJ, Type II

Physical Dimensions inches (millimeters) 28-Lead Ceramic Leadless Chip Carrier (L) 24-Lead Ceramic Dual-In-Line Package (D)

Physical Dimensions inches (millimeters) (Continued) 24-Lead (0.300 × Wide) Ceramic Dual-In-Line Package (SD) 24-Lead (0.300 × Wide) Molded Small Outline Package, JEDEC (S)

Physical Dimensions inches (millimeters) (Continued) 24-Lead Molded Shrink Small Outline, EIAJ, Type II (MSA) 24-Lead (0.300 × Wide) Molded Dual-In-Line Package (SP)

54F/74F544 Octal Registered Transceiver Physical Dimensions inches (millimeters) (Continued) 24-Lead Ceramic Flatpak (F) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor National Semiconductores National Semiconductor Corporation GmbH Japan Ltd. Hong Kong Ltd. Do Brazil Ltda. (Australia) Pty, Ltd. 2900 Semiconductor Drive Livry-Gargan-Str. 10 Sumitomo Chemical 13th Floor, Straight Block, Rue Deputado Lacorda Franco Building 16 P.O. Box 58090 D-82256 F 4urstenfeldbruck Engineering Center Ocean Centre, 5 Canton Rd. 120-3A Business Park Drive Santa Clara, CA 95052-8090 Germany Bldg. 7F Tsimshatsui, Kowloon Sao Paulo-SP Monash Business Park Tel: 1(800) 272-9959 Tel: (81-41) 35-0 1-7-1, Nakase, Mihama-Ku Hong Kong Brazil 05418-000 Nottinghill, Melbourne TWX: (910) 339-9240 Telex: 527649 Chiba-City, Tel: (852) 2737-1600 Tel: (55-11) 212-5066 Victoria 3168 Australia Fax: (81-41) 35-1 Ciba Prefecture 261 Fax: (852) 2736-9960 Telex: 391-1131931 NSBR BR Tel: (3) 558-9999 Tel: (043) 299-2300 Fax: (55-11) 212-1181 Fax: (3) 558-9998 Fax: (043) 299-2500 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.