74F539 PHILIPS | Alldatasheet
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Philips Semiconductors Product specification 74F539Dual 1-of-4 decoder (3-State)
11990 Feb 23 853–1274 98905
DESCRIPTION
The 74F539 contains two independent decoders. Each accepts two address (A0 - A1) input signals and decodes them to select one of four mutually exclusive outputs. A Polarity control (P) input determines whether the outputs are active Low (P=H) or active High (P=L). An active-Low Enable (E ) is available for data demultiplexing. Data is routed to the selected output in non-inverted or inverted form in the active-Low mode or inverted form in the active-High mode. A High signal on the Output Enable (OE n) input forces the 3-State outputs to the high impedance state. TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F539 7.5ns 40mA
ORDERING INFORMATION
DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C 20-Pin Plastic DIP N74F539N 20-Pin Plastic SOL N74F539D PIN CONFIGURATION 10 11
1 VCC
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74F(U.L.) HIGH/LOW LOAD VALUE HIGH/LOW A0a - A1a Decoder A Address inputs 1.0/1.0 20µA/0.6mA A0b - A1b Decoder B Address inputs 1.0/1.0 20µA/0.6mA Ea, Eb Enable inputs (active Low) 1.0/1.0 20µA/0.6mA OE a, OEb Output Enable inputs (active Low) 1.0/1.0 20µA/0.6mA Pa, Pb Polarity control inputs 1.0/1.0 20µA/0.6mA Q0a–Q3a Decoder A Data outputs 150/40 3.0mA/24mA Q0b–Q3b Decoder A Data outputs 150/40 3.0mA/24mA NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state. LOGIC SYMBOL 67 1 7 VCC = Pin 20 GND = Pin 10 12 11 9 8 3 2 1 19 Q0a Q1a Q2a Q3a Q0b Q1b Q2b Q3b Pa Ea OEa Pb Eb OEb A0a A1a A0b SF01014 A1b LOGIC SYMBOL (IEEE/IEC) DMUX 5 0,4
1 G 0
1,4 2,4 3,4 4 N4 EN
Philips Semiconductors Product specification 74F539Dual 1-of-4 decoder (3-State)
1990 Feb 23 2
VCC = Pin 20 GND = Pin 10 12, 3 11, 2 9, 1 8, 19 7, 18 6, 17 13, 4 14, 5 SF01016 En 15, 16 FUNCTION TABLE INPUTS OUTPUTS OPERATING MODEOE n En A1n A0n Q0n Q1n Q2n Q3n OPERATING MODE H X X X Z Z Z Z High Impedance L H X X Qn=P Disable L L L L L L L L L L H H L H L H H L L L L H L L L L H L L L L H Active High output (P = L) L L L L L L L L L L H H L H L H L H H H H L H H H H L H H H H L Active Low output (P = H) H = High voltage level L = Low voltage level X = Don’t care Z = High impedance “off” state ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL PARAMETER RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to +VCC V IOUT Current applied to output in Low output state 48 mA Tamb Operating free-air temperature range 0 to +70 °C Tstg Storage temperature –65 to +150 °C
Philips Semiconductors Product specification 74F539Dual 1-of-4 decoder (3-State)
1990 Feb 23 3
RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS UNITSYMBOL PARAMETER MIN NOM MAX UNIT VCC Supply voltage 4.5 5.0 5.5 V VIH High-level input voltage 2.0 V VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –3 mA IOL Low-level output current 24 mA Tamb Operating free-air temperature range 0 70 °C DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS 1 LIMITS UNITSYMBOL PARAMETER TEST CONDITIONS 1 MIN TYP 2 MAX UNIT VO High level output voltage VCC = MIN, VIL = MAX, ±10%V CC 2.4 V VOH High-level output voltage VCC = MIN , VIL = MAX , VIH = MIN, IOH = MAX ±5%V CC 2.7 3.4 V VOL Low-level output voltage VCC = MIN, VIL = MAX, ±10%V CC 0.35 0.50 V VOL Low-level output voltage VCC = MIN , VIL = MAX , VIH = MIN, IOL = MAX ±5%V CC 0.35 0.50 V VIK Input clamp voltage VCC = MIN, II = IIK –0.73 –1.2 V II Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA IIH High-level input current VCC = MAX, VI = 2.7V 20 µA IIL Low-level input current VCC = MAX, VI = 0.5V –0.6 mA IOZH Off-state output current High-level voltage applied VCC = MAX, VO = 2.7V 50 µA IOZL Off-state output current Low-level voltage applied VCC = MAX, VO = 0.5V –50 µA IOS Short-circuit output current3 VCC = MAX –60 –150 mA ICCH 35 50 mA ICC Supply current ICCL VCC = MAX 40 55 mA ICCZ 40 60 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value under the recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS , the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, I OS should be performed last.
Philips Semiconductors Product specification 74F539Dual 1-of-4 decoder (3-State)
1990 Feb 23 4
AC ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER TEST CONDITIONS LIMITS UNITSYMBOL PARAMETER TEST CONDITIONS Tamb = +25°C Tamb = 0°C to +70°C UNITSYMBOL PARAMETER TEST CONDITIONS VCC = +5.0V VCC = +5.0V ± 10% UNIT C L = 50pF, RL = 500Ω C L = 50pF, RL = 500Ω MIN TYP MAX MIN MAX tPLH tPHL Propagation delay An to Qn Waveform 1 4.5 3.0 8.5 8.0 12.5 12.5 4.0 3.0 13.5 13.0 ns ns tPLH tPHL Propagation delay E n to Qn Waveform 2 5.0 3.0 7.5 7.0 11.0 11.0 4.5 3.0 12.0 11.5 ns ns tPLH tPHL Propagation delay Pn to Qn Waveform 1 4.0 3.5 6.5 5.5 9.5 9.0 3.5 3.0 10.5 9.5 ns ns tPLH tPHL Propagation delay Pn to Qn (INV) Waveform 2 6.0 4.0 11.5 6.0 14.5 9.0 5.0 4.0 15.5 9.5 ns ns tPZH tPZL Output Enable time OE n to Qn Waveform 3 Waveform 4 2.5 5.5 4.0 7.0 7.5 10.5 2.0 5.0 8.5 11.5 ns ns tPHZ tPLZ Output Disable time OE n to Qn Waveform 3 Waveform 4 1.5 2.0 3.0 4.0 6.0 8.0 1.0 1.5 6.5 8.5 ns ns AC WAVEFORMS For all waveforms, VM = 1.5V. VM VM VM VM tPHLtPLH An, Pn Qn SF01017 Waveform 1. Propagation Delay for Non-Inverting Outputs VM VM VM VM tPLHtPHL En, Pn Qn SF01018 Waveform 2. Propagation Delay for Inverting Outputs VM VM VM tPHZtPZH OE n Qn VOH -0.3V SF01019 Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level VM VM VM tPLZtPZL OE n Qn VOL +0.3V SF01020 Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
Philips Semiconductors Product specification 74F539Dual 1-of-4 decoder (3-State)
1990 Feb 23 5
tw 90% VM 10% 90% VM 10% 90% VM 10% 90% VM 10% NEGATIVE PULSE POSITIVE PULSE tw AMP (V) tTHL (tf ) INPUT PULSE REQUIREMENTS rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns Input Pulse Definition VCC family 74F D.U.T.PULSE GENERATOR R LC LR T VIN VOUT Test Circuit for 3-State Outputs DEFINITIONS: R L = Load resistor; see AC electrical characteristics for value. C L = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. R T = Termination resistance should be equal to ZOUT of pulse generators. tTHL (tf ) tTLH (tr ) tTLH (tr ) AMP (V) amplitude 3.0V 1.5V VM R L 7.0V SF00777 TEST SWITCH tPLZ closed tPZL closed All other open SWITCH POSITION