74F539

74F539 FAIRCHILD | Alldatasheet

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© 1999 Fairchild Semiconductor Corporation DS009552 www.fairchildsemi.com April 1988 Revised August 1999 74F539 Dual 1-of-4 Decoder with 3-STATE Outputs 74F539 Dual 1-of-4 Decoder with 3-STATE Outputs General Description The 74F539 contains two independent decoders. Each accepts two Address (A0, A1) input signals and decodes them to select one of four mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active HIGH (P = L) or active LOW (P = H). An active LOW input Enable (E) is available for data demultiplexing; data is routed to the selected output in non-inverted form in the active LOW mode or in inverted form in the active HIGH mode. A HIGH signal on the active LOW Output Enable (OE ) input forces the 3-STATE outputs to the high imped- ance state. Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Order Number Package Number Package Description 74F539SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F539PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

www.fairchildsemi.com 2 74F539 Unit Loading/Fan Out Truth Table (each half) H = HIGH Voltage Level X = Immaterial L = LOW Voltage Level Z = High Impedance Logic Diagram (one half shown) Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Pin Names Description U.L. Input IIH/IIL HIGH/LOW Output IOH /IOL A0a–A1a Side A Address Inputs 1.0/1.0 20 µA/−0.6 mA A0b–A1b Side B Address Inputs 1.0/1.0 20 µA/−0.6 mA Ea, Eb Enable Inputs (Active LOW) 1.0/1.0 20 µA/−0.6 mA OE a, OEb Output Enable Inputs (Active LOW) 1.0/1.0 20 µA/−0.6 mA Pa, Pb Polarity Control Inputs 1.0/1.0 20 µA/−0.6 mA O 0a–O 3a Side A 3-STATE Outputs 150/40 (33.3) −3 mA/24 mA (20 mA) O 0b–O 3b Side B 3-STATE Outputs 150/40 (33.3) −3 mA/24 mA (20 mA) Function Inputs Outputs OE E A 1 A 0 O 0 O 1 O 2 O 3 High Impedance H X X X Z Z Z Z Disable L H X X O n = P Active HIGH L L L L H L L L Output L L L H L H L L (P = L ) L L HLLLHL LLHH L L L H Active LOW L L L L L H H H Output L L L H H L H H (P = H) L L H L H H L H LL HHHHHL

3 www.fairchildsemi.com 74F539 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C VCC Pin Potential to Ground Pin −0.5V to +7.0V Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Current Applied to Output in LOW State (Max) twice the rated I OL (mA) Free Air Ambient Temperature 0 °C to +70°C Supply Voltage +4.5V to +5.5V Symbol Parameter Min Typ Max Units VCC Conditions VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal VCD Input Clamp Diode Voltage −1.2 V Min I IN = −18 mA VOH Output HIGH 10% V CC 2.5 VM i n IOH = −1 mA Voltage 10% V CC 2.4 I OH = −3 mA 5% VCC 2.7 I OH = −1 mA 5% VCC 2.7 I OH = −3 mA VOL Output LOW 10% V CC 0.5 V Min I OL = 24 mA Voltage IIH Input HIGH 5.0 µAM a x V IN = 2.7V Current IBVI Input HIGH Current 7.0 µAM a x V IN = 7.0V Breakdown Test ICEX Output HIGH 50 µAM a x V OUT = VCCLeakage Current VID Input Leakage 4.75 V 0.0 IID = 1.9 µA Test All Other Pins Grounded IOD Output Leakage 3.75 µA0 . 0 VIOD = 150 mV Circuit Current All Other Pins Grounded IIL Input LOW Current −0.6 mA Max V IN = 0.5V IOZH Output Leakage Current 50 µAM a x V OUT = 2.7V IOZL Output Leakage Current −50 µAM a x V OUT = 0.5V IOS Output Short-Circuit Current −60 −150 mA Max V OUT = 0V IZZ Bus Drainage Test 500 µA0 . 0 V V OUT = 5.25V ICCH Power Supply Current 28 45 mA Max V O = HIGH ICCL Power Supply Current 40 60 mA Max V O = LOW ICCZ Power Supply Current 40 60 mA Max V O = HIGH Z

www.fairchildsemi.com 4 74F539 Symbol Parameter TA = +25°CT A = 0°C to +70°C Units VCC = +5.0V V CC = +5.0V C L = 50 pF C L = 50 pF Min Typ Max Min Max ns ns ns

5 www.fairchildsemi.com 74F539 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B

www.fairchildsemi.com 6 74F539 Dual 1-of-4 Decoder with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com