54F410DM NSC | Alldatasheet
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Features
Y Edge-triggered output register Y Typical access time of 35 ns Y TRI-STATE outputs Y Optimized for register stack operation Y 18-pin package Y 9410 replacement Commercial Military Package Package DescriptionNumber 74F410PC N18A 18-Lead (0.300 × Wide) Molded Dual-In-Line 54F410DM (Note 1) J18A 18-Lead Ceramic Dual-In-Line 74F410SC M20B 20-Lead (0.300 × Wide) Molded Small Outline, JEDEC 54F410LM W20A 20-Lead Cerpak Note 1: Military grade device with environmental and burn-in processing. Use suffix e DMQB, LMQB Logic Symbol TL/F/9538–3 Connection Diagrams Pin Assignment for DIP and SOIC TL/F/9538–1 Pin Assignment for LCC TL/F/9538–2 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
Pin Names Description U.L. Input I IH/IIL HIGH/LOW Output I OH/IOL A0 –A3 Address Inputs 1.0/1.0 20 mA/b0.6 mA D0 –D3 Data Inputs 1.0/1.0 20 mA/b0.6 mA CS Chip Select Input (Active LOW) 1.0/2.0 20 mA/b1.2 mA OE Output Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA WE Write Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA CP Clock Input (Outputs Change on LOW-to-HIGH Transition) 1.0/2.0 20 mA/b1.2 mA Q0 –Q3 TRI-STATE Outputs 150/40 (33.3) b3 mA/24 mA (20 mA) Functional Description Write Operation ÐWhen the three control inputs, Write En- able (WE ), Chip Select (CS ), and Clock (CP), are LOW the information on the data inputs (D 0 –D3) is written into the memory location selected by the address inputs (A 0 –A3). If the input data changes while WE ,C S , and CP are LOW, the contents of the selected memory location follow these changes, provided setup and hold time criteria are met. Read Operation ÐWhenever CS is LOW and CP goes from LOW-to-HIGH, the contents of the memory location select- ed by the address inputs (A 0 –A3) are edge-triggered into the Output Register. The (OE ) input controls the output buffers. When OE is HIGH the four outputs (Q 0 –Q3) are in a high impedance or OFF state; when OE is LOW, the outputs are determined by the state of the Output Register. Block Diagram TL/F/9538–4
Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Storage Temperature b65§Ct o a150§C Ambient Temperature under Bias b55§Ct o a125§C Junction Temperature under Bias b55§Ct o a175§C Plastic b55§Ct o a150§C VCC Pin Potential to Ground Pin b0.5V to a7.0V Input Voltage (Note 2) b0.5V to a7.0V Input Current (Note 2) b30 mA to a5.0 mA Voltage Applied to Output in HIGH State (with V CC e 0V) Standard Output b0.5V to V CC TRI-STATE Output b0.5V to a5.5V Current Applied to Output in LOW State (Max) twice the rated I OL (mA) Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Recommended Operating Conditions Free Air Ambient Temperature Military b55§Ct o a125§C Commercial 0 §Ct o a70§C Supply Voltage Military a4.5V to a5.5V Commercial a4.5V to a5.5V Symbol Parameter 54F/74F Units V CC Conditions Min Typ Max VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal VCD Input Clamp Diode Voltage b1.2 V Min I IN eb 18 mA VOH Output HIGH 54F 10% V CC 2.5 I OH eb 1m A Voltage 54F 10% V CC 2.4 I OH eb 3m A 74F 10% V CC 2.5 V Min I OH eb 1m A 74F 10% V CC 2.4 I OH eb 3m A 74F 5% V CC 2.7 I OH eb 3m A VOL Output LOW 54F 10% V CC 0.5 V Min IOL e 20 mA Voltage 74F 10% V CC 0.5 I OL e 24 mA IIH Input HIGH 54F 20.0 mA Max V IN e 2.7VCurrent 74F 5.0 IBVI Input HIGH Current 54F 100 mA Max V IN e 7.0VBreakdown Test 74F 7.0 ICEX Output HIGH 54F 250 mA Max V OUT e VCCLeakage Current 74F 50 VID Input Leakage 74F 4.75 V 0.0 IID e 1.9 mA Test All Other Pins Grounded IOD Output Leakage 74F 3.75 mA 0.0 VIOD e 150 mV Circuit Current All Other Pins Grounded IIL Input LOW Current b0.6 mA Max VIN e 0.5V (A n,D n,O E ,W E ) b1.2 V IN e 0.5V (CS , CP) IOZH Output Leakage Current 50 mA Max V OUT e 2.7V IOZL Output Leakage Current b50 mA Max V OUT e 0.5V IOS Output Short-Circuit Current b60 b150 mA Max V OUT e 0V IZZ Bus Drainage Test 500 mA 0.0V V OUT e 5.25V
Symbol Parameter 54F/74F Units V CC Conditions Min Typ Max ICCH Power Supply Current 47 70 mA Max V O e HIGH ICCL Power Supply Current 47 70 mA Max V O e LOW ICCZ Power Supply Current 47 70 mA Max V O e HIGH Z 74F 54F 74F TA ea 25§C TA,V CC e Mil T A,V CC e ComSymbol Parameter V CC ea 5.0V CL e 50 pF C L e 50 pF Units CL e 50 pF Min Max Min Max Min Max ns AC Operating Requirements 74F 54F 74F Symbol Parameter TA ea 25§C TA,V CC e Mil T A,V CC e Com UnitsVCC ea 5.0V Min Max Min Max Min Max READ MODE ts(H) Setup Time, HIGH or LOW 15.0 23 17.0 ts(L) A n to CP 15.0 23 17.0 th(H) Hold Time, HIGH or LOW 0 0 0 ns th(L) A n to CP 0 0 0 WRITE MODE ts(H) Setup Time, HIGH or LOW 0 0 0 ts(L) A n to WE 000 th(H) Hold Time, HIGH or LOW 0 0 0 ns th(L) A n to WE 000 ts(H) Setup Time, HIGH or LOW 5.0 8.5 6.0 ts(L) D n to WE 5.0 8.5 6.0 th(H) Hold Time, HIGH or LOW 0 2.5 0 ns th(L) D n to WE 0 2.5 0 tw WE Pulse Width 7.5 9.5 8.5 nsRequired to Write tw CS Pulse Width 7.5 9.5 8.5 nsRequired to Write tw CP Pulse Width 7.5 9.5 8.5 nsRequired to Write Note: Military temperature range for this device is b40§Ct o a85§C.
Ordering Information
The device number is used to form part of a simplified purchasing code where a package type and temperature range are defined as follows: 74F 410 S C X Temperature Range Family Special Variations 74F e Commercial X e Devices shipped in 13 × reels 54F e Military QB e Military grade device with environmental and burn-in Device Type processing Package Code Temperature RangeP e Plastic DIP C e Commercial (0 §Ct o a70§C)S e Small Outline (SOIC) M e Military ( b55§Ct o a125§C)D e Ceramic DIP L e Package Leadless Chip Carrier
Physical Dimensions inches (millimeters) 18-Lead Ceramic Dual-In-Line Package (D) 20-Lead (0.300 × Wide) Molded Small Outline Package, JEDEC (S)
Physical Dimensions inches (millimeters) (Continued) 18-Lead (0.300 × Wide) Molded Dual-In-Line Package (P)
54F/74F410 Register StackÐ1 6 x 4 RAM TRI-STATE Output Register Physical Dimensions inches (millimeters) (Continued) 20-Lead Cerpack LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.
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