74F381 PHILIPS | Alldatasheet

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Philips Semiconductors Product specification 74F381Arithmetic Logic Unit

11989 Mar 01 853–0418 95907

FEATURES

  • Low-input loading minimizes drive requirements
  • Performs six arithmetic and logic functions
  • Selectable Low (clear) and High (preset) functions
  • Carry Generate and Propagate outputs for use with Carry look-ahead generator

DESCRIPTION

The 74F381 performs three arithmetic and three logic operations on two 4-bit words, A and B. Three additional Select (S0–S2) input codes force the Function outputs Low or High. Carry Propagate (P) and Generate (G) ouputs are provided for use with the 74F182 Carry Look Ahead Generator for high-speed expansion to longer word lengths. For ripple expansion, refer to the 74F382 ALU data sheet. Signals applied to the Select inputs (S0–S2) determine the mode of operation, as indicated in the Function Select Table. An extensive listing of input and output function levels is shown in the Function Table. The circuit performs the arithmetic functions for either active-HIgh or active-Low operands, with output levels in the same convention. In the subtract operating modes, it is necessary to force a Carry (High for active-HIgh operands, Low for active-Low operands) into the Cn input of the least significant package. The Carry Generate (G) and Carry Propagate (P) outputs supply input signals to the 74F182 Carry look-ahead generator for expansion to longer word length, as shown in Figure 1. Note that a 74F382 ALU is used for the most significant package. Typical delays for Figure 1 are given in Table 1. PIN CONFIGURA TION 147 138 VCCA1 GND Cn P G SF00921 129 1110 TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPL Y CURRENT (TOTAL) 74F381 6.5ns 59mA

ORDERING INFORMATION

DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C 20-pin plastic DIP N74F381N 20-pin plastic SO N74F381D INPUT AND OUTPUT LOADING AND F AN OUT TABLE PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW A0 – A3 A operand inputs 1.0/4.0 20µA/2.4mA B0 – B3 A operand inputs 1.0/4.0 20µA/2.4mA S0 – S2 Function select inputs 1.0/1.0 20µA/0.6mA Cn Carry input 1.0/4.0 20µA/2.4mA P Carry Propagate ouptut (active-Low) 50/33 1.0mA/20mA G Carry Generate ouptut (active-Low) 50/33 1.0mA/20mA F0–F3 Outputs 50/33 1.0mA/20mA NOTE: One (1.0) FAST unit load is defined as 20µA in the High state and 0.6mA in the Low state.

Philips Semiconductors Product specification 74F381Arithmetic Logic Unit

1989 Mar 01 2

VCC = Pin 20 GND = Pin 10 A0 B0 A1 B1 A2 B2 A3 B3 3 4 1 2 19 18 17 16 Cn 8 9 11 12 SF00922 G P IEC/IEEE SYMBOL (1/2) Bl P SF00923 Q P Q P Q P Q [1] [2] [4] [8] 3 Cl (1/2/3) CP (1/2/3) CG M 0 7 14 ALU

Philips Semiconductors Product specification 74F381Arithmetic Logic Unit

1989 Mar 01 3

VCC = Pin 20 GND = Pin 10 15Cn P G SF00924

Philips Semiconductors Product specification 74F381Arithmetic Logic Unit

1989 Mar 01 4

MODES0 S1 S2 Cn An Bn F0 F1 F2 F3 G P OPERATING MODE L L L X X X L L L L L L Clear H L L L L L H H H H H L B minus A H L L L L H L H H H L L B minus A H L L L H L L L L L H H B minus A H L L L H H H H H H H L B minus AH L L H L L L L L L H L B minus A H L L H L H H H H H L L H L L H H L H L L L H H H L L H H H L L L L H L L H L L L L H H H H H L A minus B L H L L L H L L L L H H A minus B L H L L H L L H H H L L A minus BL H L L H H H H H H H L A minus BL H L H L L L L L L H L A minus B L H L H L H H L L L H H L H L H H L H H H H L L L H L H H H L L L L H L H H L L L L L L L L H H A Plus B H H L L L H H H H H H L A Plus B H H L L H L H H H H H L A Plus BH H L L H H L H H H L L A Plus BH H L H L L H L L L H H A Plus B H H L H L H L L L L H L H H L H H L L L L L H L H H L H H H H H H H L L L L H X L L L L L L H H A BL L H X L H H H H H H H A BL L H X H L H H H H H L A B L L H X H H L L L L L L H L H X L L L L L L H H A + BH L H X L H H H H H H H A + BH L H X H L H H H H H H A + B H L H X H H H H H H H L L H H X L L L L L L L L ABL H H X L H L L L L H H ABL H H X H L L L L L L L AB L H H X H H H H H H H L H H H X L L H H H H H H PresetH H H X L H H H H H H H PresetH H H X H L H H H H H H Preset H H H X H H H H H H H L H = High voltage level L = Low voltage level X = Don’t care

1989 Mar 01 5

Table 1. 16-Bit Delay Tabulation Figure 1. 16-bit Look-ahead Carry ALU Expansion

Philips Semiconductors Product specification 74F381Arithmetic Logic Unit

1989 Mar 01 6

RECOMMENDED OPERA TING CONDITIONS SYMBOL PARMETER LIMITS UNITSYMBOL SYMBOL PARMETER MIN NOM MAX UNIT VCC Supply voltage 4.5 5.0 5.5 V VIH High-level input voltage 2.0 V VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –1 mA IOL Low-level output current 20 mA Tamb Operating free-air temperature range 0 70 °C DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST LIMITS UNIT SYMBOL PARAMETER CONDITIONS 1 MIN TYP 2 MAX VOH High-level output voltage VCC = MIN, VIL = MAX, ±10%V CC 2.5 V VOH High-level output voltage VIH = MIN, IOH = MAX ±5%V CC 2.7 3.4 V VOL Low-level output voltage VCC = MIN, VIL = MAX, ±10%V CC 0.30 0.50 V VOL Low-level output voltage VIH = MIN, IOL = MAX ±5%V CC 0.30 0.50 V VIK Input clamp voltage VCC = MIN, II = IIK –0.73 –1.2 V II Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA IIH High-level input current VCC = MAX, VI = 2.7V 20 µA IIL Low-level input current An, Bn, Cn VCC = MAX, VI = 0.5V –2.4 mA IIL Low-level input current S0, S1, S2 VCC = MAX, VI = 0.5V –0.6 mA IOS Short-circuit output current3 VCC = MAX –60 –150 mA ICC Supply current (total) VCC = MAX 59 89 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS , the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last.

Philips Semiconductors Product specification 74F381Arithmetic Logic Unit

1989 Mar 01 7

AC ELECTRICAL CHARACTERISTICS LIMITS Tamb = +25°C Tamb = 0°C to +70°C SYMBOL PARAMETER TEST VCC = +5.0V VCC = +5.0V ± 10% UNIT CONDITION C L = 50pF, RL = 500Ω C L = 50pF, RL = 500Ω MIN TYP MAX MIN MAX tPLH tPHL Propagation delay Cn to Fn W aveform 1 2.5 2.5 6.0 4.5 11.0 6.5 2.5 2.5 12.5 7.5 ns tPLH tPHL Propagation delay Any An or Bn to any Fn W aveform 1 3.5 3.0 7.0 6.0 13.0 9.0 3.5 3.0 16.0 10.0 ns tPLH tPHL Propagation delay Sn to Fn W aveform 1 5.0 4.0 9.0 7.5 20.0 10.5 5.0 4.0 21.5 11.5 ns tPLH tPHL Propagation delay An to Bn to G W aveform 1 3.5 3.0 6.5 6.0 9.0 8.5 3.5 3.0 10.0 9.0 ns tPLH tPHL Propagation delay An or Bn to P W aveform 1 3.0 3.5 5.5 6.0 8.0 8.5 3.0 3.5 9.0 9.0 ns tPLH tPHL Propagation delay Sn to G or P W aveform 1 5.0 5.5 7.5 8.5 11.0 12.5 5.0 5.0 12.5 14.0 ns AC WAVEFORMS For all waveforms, VM = 1.5V. VMVM VMVM VOUT VIN tPHLtPLH SF00926 W aveform 1. Propagation Delay for Non-Inverting or Inverting paths TEST CIRCUIT AND W AVEFORM tw 90% VM 10% 90% VM 10% 90% VM 10% 90% VM 10% NEGATIVE PULSE POSITIVE PULSE tw AMP (V) tTHL (tf ) INPUT PULSE REQUIREMENTS rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns Input Pulse Definition VCC family 74F D.U.T.PULSE GENERATOR R LC LR T VIN VOUT Test Circuit for Totem-Pole Outputs DEFINITIONS: R L = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. C L = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. R T = T ermination resistance should be equal to ZOUT of pulse generators. tTHL (tf ) tTLH (tr ) tTLH (tr ) AMP (V) amplitude 3.0V 1.5V VM SF00006