74F378SC

54F378DM NSC | Alldatasheet

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Features

Y 6-bit high-speed parallel register Y Positive edge-triggered D-type inputs Y Fully buffered common clock and enable inputs Y Input clamp diodes limit high-speed termination effects Y Full TTL and CMOS compatible Commercial Military Package Package DescriptionNumber 74F378PC N16E 16-Lead (0.300 × Wide) Molded Dual-In-Line 54F378DM (QB) J16A 16-Lead Ceramic Dual-In-Line 74F378SC (Note 1) M16A 16-Lead (0.150 × Wide) Molded Small Outline, JEDEC 74F378SJ (Note 1) M16D 16-Lead (0.300 × Wide) Molded Small Outline, EIAJ 54F378FM (QB) W16A 16-Lead Cerpack 54F378LM (QB) E20A 20-Lead Ceramic Leadless Chip Carrier, Type C Note 1: Devices also available in 13 × reel. Use suffix e SCX and SJX. Logic Symbols Connection Diagrams TL/F/9526–1 IEEE/IEC TL/F/9526–4 Pin Assignment for DIP, SOIC and Flatpak TL/F/9526–2 Pin Assignment for LCC TL/F/9526–3 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation RRD-B30M75/Printed in U. S. A.

Pin Names Description U.L. Input I IH/IIL HIGH/LOW Output I OH/IOL E Enable Input (Active LOW) 1.0/1.0 20 mA/b0.6 mA D0 –D5 Data Inputs 1.0/1.0 20 mA/b0.6 mA CP Clock Pulse Input (Active Rising Edge) 1.0/1.0 20 mA/b0.6 mA Q0 –Q5 Outputs 50/33.3 b1 mA/20 mA Functional Description The ’F378 consists of six edge-triggered D-type flip-flops with individual D inputs and Q inputs. The Clock (CP) and Enable (E ) inputs are common to all flip-flops. When the E input is LOW, new data is entered into the register on the LOW-to-HIGH transition of the CP input. When the E input is HIGH the register will retain the present data independent of the CP input. Truth Table Inputs Output E CP D n Qn H L X No Change L L HH L L LL H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial L e LOW-to-HIGH Clock Transition Logic Diagram TL/F/9526–5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Storage Temperature b65§Ct o a150§C Ambient Temperature under Bias b55§Ct o a125§C Junction Temperature under Bias b55§Ct o a175§C Plastic b55§Ct o a150§C VCC Pin Potential to Ground Pin b0.5V to a7.0V Input Voltage (Note 2) b0.5V to a7.0V Input Current (Note 2) b30 mA to a5.0 mA Voltage Applied to Output in HIGH State (with V CC e 0V) Standard Output b0.5V to V CC TRI-STATEÉ Output b0.5V to a5.5V Current Applied to Output in LOW State (Max) twice the rated I OL (mA) Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Recommended Operating Conditions Free Air Ambient Temperature Military b55§Ct o a125§C Commercial 0 §Ct o a70§C Supply Voltage Military a4.5V to a5.5V Commercial a4.5V to a5.5V Symbol Parameter 54F/74F Units V CC Conditions Min Typ Max VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal VCD Input Clamp Diode Voltage b1.2 V Min I IN eb 18 mA VOH Output HIGH 54F 10% V CC 2.5 I OH eb 1m A Voltage 74F 10% V CC 2.5 V Min I OH eb 1m A 74F 5% V CC 2.7 I OH eb 1m A VOL Output LOW 54F 10% V CC 0.5 V Min IOL e 20 mA Voltage 74F 10% V CC 0.5 I OL e 20 mA IIH Input HIGH 54F 20.0 mA Max VIN e 2.7V Current 74F 5.0 IBVI Input HIGH Current 54F 100 mA Max VIN e 7.0V Breakdown Test 74F 7.0 ICEX Output HIGH 54F 250 mA Max VOUT e VCC Leakage Current 74F 50 VID Input Leakage 74F 4.75 V 0.0 IID e 1.9 mA Test All Other Pins Grounded IOD Output Leakage 74F 3.75 mA 0.0 VIOD e 150 mV Circuit Current All Other Pins Grounded IIL Input LOW Current b0.6 mA Max V IN e 0.5V IOS Output Short-Circuit Current b60 b150 mA Max V OUT e 0V ICCL Power Supply Current 30 45 mA Max V O e LOW

TA ea 25§C TA,V CC e Mil T A,V CC e ComSymbol Parameter V CC ea 5.0V CL e 50 pF C L e 50 pF Units CL e 50 pF Min Typ Max Min Max Min Max fmax Maximum Input Frequency 80 100 70 80 MHz AC Operating Requirements 74F 54F 74F Symbol Parameter TA ea 25§C TA,V CC e Mil T A,V CC e Com UnitsVCC ea 5.0V Min Max Min Max Min Max ts(H) Setup Time, HIGH or LOW 4.0 5.0 4.0 ts(L) D n to CP 4.0 5.0 4.0 ns th(H) Hold Time, HIGH or LOW 0 2.0 0 th(L) D n to CP 0 2.0 0 ts(H) Setup Time, HIGH or LOW 6.0 4.5 6.0 ts(L) E to CP 10.0 13.0 10.0 ns th(H) Hold Time, HIGH or LOW 0 0 0 th(L) E to CP 0 0 0

Ordering Information

The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: 74F 378 S C X Temperature Range Family Special Variations 74F e Commercial QB e Military grade device with 54F e Military environmental and burn-in processingDevice Type X e Devices shipped in 13 × reel Package Code Temperature RangeP e Plastic DIP C e Commercial (0 §Ct o a70§C)D e Ceramic DIP M e Military ( b55§Ct o a125§C)F e Flatpak L e Leadless Chip Carrier (LCC) S e Small Outline SOIC JEDEC SJ e Small Outline SOIC EIAJ

Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier (L) 16-Lead Ceramic Dual-In-Line Package (D)

Physical Dimensions inches (millimeters) (Continued) 16-Lead (0.150 × Wide) Molded Small Outline Package, JEDEC 16-Lead (0.300 × Wide) Molded Small Outline Package, EIAJ (SJ)

Physical Dimensions inches (millimeters) (Continued) 16-Lead (0.300 × Wide) Molded Dual-In-Line Package (P)

54F/74F378 Parallel D Register with Enable Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Flatpak (F) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor National Semiconductores National Semiconductor Corporation GmbH Japan Ltd. Hong Kong Ltd. Do Brazil Ltda. (Australia) Pty, Ltd. 2900 Semiconductor Drive Livry-Gargan-Str. 10 Sumitomo Chemical 13th Floor, Straight Block, Rue Deputado Lacorda Franco Building 16 P.O. Box 58090 D-82256 F 4urstenfeldbruck Engineering Center Ocean Centre, 5 Canton Rd. 120-3A Business Park Drive Santa Clara, CA 95052-8090 Germany Bldg. 7F Tsimshatsui, Kowloon Sao Paulo-SP Monash Business Park Tel: 1(800) 272-9959 Tel: (81-41) 35-0 1-7-1, Nakase, Mihama-Ku Hong Kong Brazil 05418-000 Nottinghill, Melbourne TWX: (910) 339-9240 Telex: 527649 Chiba-City, Tel: (852) 2737-1600 Tel: (55-11) 212-5066 Victoria 3168 Australia Fax: (81-41) 35-1 Ciba Prefecture 261 Fax: (852) 2736-9960 Telex: 391-1131931 NSBR BR Tel: (3) 558-9999 Tel: (043) 299-2300 Fax: (55-11) 212-1181 Fax: (3) 558-9998 Fax: (043) 299-2500 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.