74F350 FAIRCHILD | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 8

Technical content

Features

■ Linking inputs for word expansion ■ 3-STATE outputs for extending shift range Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Truth Table H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Order Number Package Number Package Description 74F350SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74F350SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F350PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Inputs Outputs OE S1 S0 O 0 O 1 O 2 O 3 HXXZZZZ LLLI 0 I1 I2 I3 LLH I −1 I0 I1 I2 LHL I −2 I−1 I0 I1 LHH I −3 I−2 I−1 I0

www.fairchildsemi.com 2 74F350 Unit Loading/Fan Out Functional Description The 74F350 is operationally equivalent to a 4-input multi- plexer with the inputs connected so that the select code causes successive one-bit shifts of the data word. This internal connection makes it possible to perform shifts of 0, 1, 2 or 3 places on words of any length. A 4-bit data word is introduced at the I n inputs and is shifted according to the code applied to the select inputs S0, S1. Outputs O0–O 3 are 3-STATE, controlled by an active LOW output enable (OE). When OE is LOW, data outputs will follow selected data inputs; when HIGH, the data outputs will be forced to the high impedance state. This feature allows shifters to be cascaded on the same output lines or to a common bus. The shift function can be logical, with zeros pulled in at either or both ends of the shifting field; arithmetic, where the sign bit is repeated dur- ing a shift down; or end around, where the data word forms a continuous loop. Logic Equations O 0 = S0S1I0 + S0S1I−1 + S0S1I−2 + S0S1I−3 O 1 = S0S1I1 + S0S1I0 + S0S1I−1 + S0S1I−2 O 2 = S0S1I2 + S0S1I1 + S0S1I0 + S0S1I−1 O 3 = S0S1I3 + S0S1I2 + S0S1I1 + S0S1I0 Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Pin Names Description U.L. Input IIH/IIL HIGH/LOW Output IOH /IOL S0, S1 Select Inputs 1.0/2.0 20 µA/−1.2 mA I−3–I3 Data Inputs 1.0/2.0 20 µA/−1.2 mA OE Output Enable Input (Active LOW) 1.0/2.0 20 µA/−1.2 mA O 0–O 3 3-STATE Outputs 150/40 (33.3) −3 mA/24 mA (20 mA)

3 www.fairchildsemi.com 74F350

Applications

16-Bit Shift-Up 0 to 3 Places, Zero Backfill Function Table 8-Bit End Around Shift 0 to 7 Places Function Table S1 S0 Shift Function L L No Shift L H Shift 1 Place H L Shift 2 Places H H Shift 3 Places S2 S1 S0 Shift Function L L L No Shift L L H Shift End Around 1 L H L Shift End Around 2 L H H Shift End Around 3 H L L Shift End Around 4 H L H Shift End Around 5 H H L Shift End Around 6 H H H Shift End Around 7

www.fairchildsemi.com 4 74F350 13-Bit Twos Complement Scaler Function Table S1 S0 Scale LL ÷8 1/8 LH ÷4 1/4 HL ÷2 ½ H H No Change 1

5 www.fairchildsemi.com 74F350 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C VCC Pin Potential to Ground Pin −0.5V to +7.0V Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Current Applied to Output in LOW State (Max) twice the rated I OL (mA) Free Air Ambient Temperature 0 °C to +70°C Supply Voltage +4.5V to +5.5V Symbol Parameter Min Typ Max Units VCC Conditions VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal VCD Input Clamp Diode Voltage −1.2 V Min I IN = −18 mA VOH Output HIGH 10% V CC 2.5 V Min I OH = −1 mA Voltage 10% V CC 2.4 I OH = −3 mA 5% VCC 2.7 I OH = −1 mA 10% V CC 2.7 I OH = −3 mA VOL Output LOW Voltage 10% V CC 0.5 V Min I OL = 24 mA IIH Input HIGH Current 5.0 µAM a x V IN = 2.7V IBVI Input HIGH Current 7.0 µAM a x V IN = 7.0V Breakdown Test ICEX Output HIGH 50 µAM a x V OUT = VCCLeakage Current VID Input Leakage 4.75 V 0.0 IID = 1.9 µA Test All Other Pins Grounded IOD Output Leakage 3.75 µA0 . 0 VIOD = 150 mV Circuit Current All Other Pins Grounded IIL Input LOW Current −1.2 mA Max V IN = 0.5V IOZH Output Leakage Current 50 µAM a x V OUT = 2.7V IOZL Output Leakage Current −50 µAM a x V OUT = 0.5V IOS Output Short-Circuit Current −60 −150 mA Max V OUT = 0V IZZ Bus Drainage Test 500 µA0 . 0 V V OUT = 5.25V ICCH Power Supply Current 34 42 mA Max V O = HIGH ICCL Power Supply Current 40 57 mA Max V O = LOW ICCZ Power Supply Current 40 57 mA Max V O = HIGH Z

www.fairchildsemi.com 6 74F350 Symbol Parameter TA = +25°CT A = 0°C to +70°C Units VCC = +5.0V V CC = +5.0V C L = 50 pF C L = 50 pF Min Typ Max Min Max ns ns ns

7 www.fairchildsemi.com 74F350 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D

www.fairchildsemi.com 8 74F350 4-Bit Shifter with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com