SN54CBT16212A_07 TI | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 14
Technical content
/C0083/C0078/C0053/C0052/C0067/C0066/C0084/C0049/C0054/C0050/C0049/C0050/C0065/C0044 /C0083/C0078/C0055/C0052/C0067/C0066/C0084/C0049/C0054/C0050/C0049/C0050/C0065 /C0050/C0052/C0262/C0066/C0073/C0084 /C0070/C0069/C0084 /C0066/C0085/C0083/C0262/C0069/C0088/C0067/C0072/C0065/C0078/C0071/C0069 /C0083/C0087/C0073/C0084/C0067/C0072/C0069/C0083 SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Members of the Texas Instruments Widebus Family /C00685-Ω Switch Connection Between Two Ports /C0068TTL-Compatible Input Levels /C0068Latch-Up Performance Exceeds 250 mA Per JESD 17 /C0068ESD Protection Exceeds JESD 22 − 200-V Machine Model (A115-A) description/ordering information The ’CBT16212A devices provide 24 bits of high-speed TTL-compatible bus switching or exchanging. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. Each device operates as a 24-bit bus switch or a 12-bit bus exchanger that provides data exchanging between the four signal ports via the data-select (S0, S1, S2) terminals.
ORDERING INFORMATION
TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING SSOP − DL Tube SN74CBT16212ADL CBT16212ASSOP − DL Tape and reel SN74CBT16212ADLR CBT16212A −40°C to 85°C TSSOP − DGG Tape and reel SN74CBT16212ADGGR CBT16212A −40°C to 85°C TVSOP − DGV Tape and reel SN74CBT16212ADGVR CY212A VFBGA − GQL Tape and reel SN74CBT16212AGQLR CY212AVFBGA − ZQL (Pb-free) Tape and reel SN74CBT16212AZQLR CY212A −55°C to 125°C CFP − WD Tube SNJ54CBT16212AWD SNJ54CBT16212AWD † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 Copyright 2005, Texas Instruments Incorporated 1A1 1A2 2A1 2A2 3A1 3A2 GND 4A1 4A2 5A1 5A2 6A1 6A2 7A1 7A2 V CC 8A1 GND 8A2 9A1 9A2 10A1 10A2 11A1 11A2 12A1 12A2 1B1 1B2 2B1 2B2 3B1 GND 3B2 4B1 4B2 5B1 5B2 6B1 6B2 7B1 7B2 8B1 GND 8B2 9B1 9B2 10B1 10B2 11B1 11B2 12B1 12B2 SN54CBT16212A ...W D PACKAGE SN74CBT16212A . . . DGG, DGV, OR DL PACKAGE (TOP VIEW) Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. /C0079/C0110 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0109/C0112/C0108/C0105/C0097/C0110/C0116 /C0116/C0111 /C0077/C0073/C0076/C0262/C0080/C0082/C0070/C0262/C0051/C0056/C0053/C0051/C0053/C0044 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115 /C0097/C0114/C0101 /C0116/C0101/C0115/C0116/C0101/C0100 /C0117/C0110/C0108/C0101/C0115/C0115 /C0111/C0116/C0104/C0101/C0114/C0119/C0105/C0115/C0101 /C0110/C0111/C0116/C0101/C0100/C0046 /C0079/C0110 /C0097/C0108/C0108 /C0111/C0116/C0104/C0101/C0114 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115/C0044 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 Widebus is a trademark of Texas Instruments.
/C0083/C0078/C0053/C0052/C0067/C0066/C0084/C0049/C0054/C0050/C0049/C0050/C0065/C0044 /C0083/C0078/C0055/C0052/C0067/C0066/C0084/C0049/C0054/C0050/C0049/C0050/C0065 /C0050/C0052/C0262/C0066/C0073/C0084 /C0070/C0069/C0084 /C0066/C0085/C0083/C0262/C0069/C0088/C0067/C0072/C0065/C0078/C0071/C0069 /C0083/C0087/C0073/C0084/C0067/C0072/C0069/C0083 SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
J 10A1 10A2 11A1 11B1 10B2 10B1 K 11A2 12A1 12A2 12B2 12B1 11B2 FUNCTION TABLE INPUTS INPUTS/OUTPUTS FUNCTIONS2 S1 S0 A1 A2 FUNCTION L L L Z Z Disconnect L L H B1 port Z A1 port = B1 port L H L B2 port Z A1 port = B2 port L HH Z B1 port A2 port = B1 port H LL Z B2 port A2 port = B2 port H LH Z Z Disconnect H H L B1 port B2 port A1 port = B1 port A2 port = B2 port H H H B2 port B1 port A1 port = B2 port A2 port = B1 port GQL OR ZQL PACKAGE (TOP VIEW) A B C D E F G H J K 123456
/C0083/C0078/C0053/C0052/C0067/C0066/C0084/C0049/C0054/C0050/C0049/C0050/C0065/C0044 /C0083/C0078/C0055/C0052/C0067/C0066/C0084/C0049/C0054/C0050/C0049/C0050/C0065 /C0050/C0052/C0262/C0066/C0073/C0084 /C0070/C0069/C0084 /C0066/C0085/C0083/C0262/C0069/C0088/C0067/C0072/C0065/C0078/C0071/C0069 /C0083/C0087/C0073/C0084/C0067/C0072/C0069/C0083 SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (positive logic) 12B2 12B1 1B2 1B1 12A2 12A1 1A2 1A1 Pin numbers shown are for the DGG, DGV, DL, and WD packages.
/C0083/C0078/C0053/C0052/C0067/C0066/C0084/C0049/C0054/C0050/C0049/C0050/C0065/C0044 /C0083/C0078/C0055/C0052/C0067/C0066/C0084/C0049/C0054/C0050/C0049/C0050/C0065 /C0050/C0052/C0262/C0066/C0073/C0084 /C0070/C0069/C0084 /C0066/C0085/C0083/C0262/C0069/C0088/C0067/C0072/C0065/C0078/C0071/C0069 /C0083/C0087/C0073/C0084/C0067/C0072/C0069/C0083 SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) SN54CBT16212A SN74CBT16212A UNITMIN MAX MIN MAX UNIT VCC Supply voltage 4 5.5 4 5.5 V VIH High-level control input voltage 2 2 V VIL Low-level control input voltage 0.8 0.8 V TA Operating free-air temperature −55 125 −40 85 °C NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS SN54CBT16212A SN74CBT16212A UNITPARAMETER TEST CONDITIONS MIN TYP ‡ MAX MIN TYP ‡ MAX UNIT VIK VCC = 4.5 V, II = −18 mA −1.2 −1.2 V II VCC = 0, VI = 5.5 V 10 10 AII VCC = 5.5 V, VI = 5.5 V or GND ±1 ±1 µA ICC VCC = 5.5 V, IO = 0, VI = VCC or GND 3.2 3 µA ∆ICC § Control inputsVCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND 2.5 2.5 mA C i Control inputsVI = 3 V or 0 2.5 2.5 pF C io(off) VO = 3 V or 0, S0, S1, and S2 = GND 7.5 7.5 pF VCC = 4 V, TYP at VCC = 4 V VI = 2.4 V,II = 15 mA 14 20 14 20 ron¶ VI = 0 II = 64 mA 4 10 4 7 Ωron¶ VCC = 4.5 V VI = 0 II = 30 mA 4 10 4 7 Ω VCC = 4.5 V VI = 2.4 V,II = 15 mA 6 14 6 12 ‡ All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C. § This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND. ¶ Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals.
- On products compliant to MIL-PRF-38535, this parameter is not production tested.
driven by an ideal voltage source (zero output impedance). NOTES: A. C L includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms
Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 5962-9852101QXA ACTIVE CFP WD 56 1 TBD A42 SNPB N / A for Pkg Type 74CBT16212ADGGRE4 ACTIVE TSSOP DGG 56 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74CBT16212ADGVRE4 ACTIVE TVSOP DGV 56 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT16212ADGGR ACTIVE TSSOP DGG 56 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT16212ADGVR ACTIVE TVSOP DGV 56 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT16212ADL ACTIVE SSOP DL 56 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT16212ADLG4 ACTIVE SSOP DL 56 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT16212ADLR ACTIVE SSOP DL 56 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT16212ADLRG4 ACTIVE SSOP DL 56 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74CBT16212AGQLR NRND BGA MI CROSTA R JUNI OR GQL 56 1000 TBD SNPB Level-1-240C-UNLIM SN74CBT16212AZQLR ACTIVE BGA MI CROSTA R JUNI OR ZQL 56 1000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM SNJ54CBT16212AWD ACTIVE CFP WD 56 1 TBD A42 SNPB N / A for Pkg Type (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on PACKAGE OPTION ADDENDUM www.ti.com 30-Mar-2007 Addendum-Page 1
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 30-Mar-2007 Addendum-Page 2
MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 WD (R-GDFP-F**) CERAMIC DUAL FLATPACK 4040176/D 10/97
48 LEADS SHOWN
0.610 (18,80) 0.710 (18,03) 0.7400.640 0.390 (9,91) 0.370 (9,40) 0.870 (22,10) 1.130 (28,70) A 0.120 (3,05) 0.075 (1,91) LEADS** NO. OF A MIN A MAX (16,26) (15,49) 0.025 (0,635) 0.009 (0,23) 0.004 (0,10) 0.370 (9,40) 0.250 (6,35) 0.370 (9,40) 0.250 (6,35) 0.014 (0,36) 0.008 (0,20) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification only E. Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO-146AA GDFP1-F56 and JEDEC MO-146AB
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
3,70 3,50 4,90 5,10 20DIM PINS ** 4073251/E 08/00 1,20 MAX Seating Plane 0,05 0,15 0,25 0,50 0,75 0,23 0,13 11 2 24 13 4,30 4,50 0,16 NOM Gage Plane A 7,90 7,70 382416 4,90 5,103,70 3,50 A MAX A MIN 6,60 6,20 11,20 11,40 9,60 9,80 0,08 M0,070,40 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 4040048/E 12/01
48 PINS SHOWN
0.730 (18,54) 0.720 (18,29) 4828 0.370 (9,40) (9,65) 0.380 Gage Plane DIM 0.420 (10,67) 0.395 (10,03) A MIN A MAX 0.010 (0,25) PINS ** 0.630 (16,00) (15,75) 0.620 0.010 (0,25) Seating Plane 0.020 (0,51) 0.040 (1,02) 0.008 (0,203) 0.0135 (0,343) 0.008 (0,20) MIN A 0.110 (2,79) MAX 0.299 (7,59) 0.291 (7,39) 0.004 (0,10) M0.005 (0,13) 0.025 (0,635) 0°–/C02578° 0.005 (0,13) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). D. Falls within JEDEC MO-118
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 4040078/F 12/97 0,25 0,15 NOM Gage Plane 6,00 6,20 8,30 7,90 0,75 0,50 Seating Plane 0,27 0,17 A 1,20 MAX M0,08 0,10 0,50 0°–8° 14,10 13,90 48DIM A MAX A MIN PINS ** 12,40 12,60 17,10 16,90 0,15 0,05 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold protrusion not to exceed 0,15. D. Falls within JEDEC MO-153
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Cu stomers should obtain the latest relevant information before placing orders and should verify that such info rmation is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by governm ent requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI component s. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implie d, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are us ed. Information published by TI regarding third-party products or services does not consti tute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the pat ents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, lim itations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements diffe rent from or beyond the parameters stated by TI for that product or service voids all express and any imp lied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.c om Audio www.ti.com/audio Data Converters dataconverter.ti.co m Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Low Power Wireless www.ti.com/lpw Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments Post Office Box 6553 03 Dallas, Texas 75265 Copyright © 2007, Texas Instruments Incorporated