74CB3T16212DGGRE4

SN74CB3T16212 TI | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 13

Technical content

www.ti.com

FEATURES

V CC 8A1 GND 8A2 9A1 9A2 10A1 10A2 11A1 11A2 12A1 12A2 1B1 1B2 2B1 2B2 3B1 GND 3B2 4B1 4B2 5B1 5B2 6B1 6B2 7B1 7B2 8B1 GND 8B2 9B1 9B2 10B1 10B2 11B1 11B2 12B1 12B2 DGG OR DGV PACKAGE (TOP VIEW) DESCRIPTION/ORDERING INFORMATION SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER SCDS157A OCTOBER 2003 REVISED FEBRUARY 2005 Member of the Texas Instruments Widebus Family Output Voltage Translation Tracks V CC Supports Mixed-Mode Signal Operation on All Data I/O Ports 5-V Input Down to 3.3-V Output Level Shift With 3.3-V V CC 5-V/3.3-V Input Down to 2.5-V Output Level Shift With 2.5-V V CC 5-V-Tolerant I/Os With Device Powered Up or Powered Down Bidirectional Data Flow, With Near-Zero Propagation Delay Low ON-State Resistance on Characteristics on Ω Typ) Low Input/Output Capacitance Minimizes Loading io(OFF) pF Typ) Data and Control Inputs Provide Undershoot Clamp Diodes Low Power Consumption CC µ A Max) V CC Operating Range From 2.3 V to 3.6 V Data I/Os Support 0-V to 5-V Signaling Levels (0.8 1.2 1.5 1.8 2.5 3.3 Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs I off Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 250 mA Per JESD ESD Performance Tested Per JESD 2000-V Human-Body Model(A114-B, Class II) 1000-V Charged-Device Model (C101) Supports Digital Applications: Level Translation, PCI Interface, USB Interface, Memory Interleaving, and Bus Isolation Ideal for Low-Power Portable Equipment The SN74CB3T16212 is a high-speed TTL-compatible FET bus-exchange switch, with low ON-state resistance on allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks V CC The SN74CB3T16212 supports systems using 5-V TTL, 3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see Figure 1). Please be aware that an important notice concerning availability, standard warranty, and use in critical

applications

sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright 2003 2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

www.ti.com VCC VCC 5.5 V 0 V Input Voltages Output Voltages 0 V VCC − 1 V VCC − 1 V VCC IN OUT CB3T NOTE: If the input high-voltage (VIH) level is greater than or equal to VCC − 1 V and less than or equal to 5.5 V, the output high-voltage (VOH) level is equal to approximately the VCC voltage level. SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER SCDS157A OCTOBER 2003 REVISED FEBRUARY 2005 Figure Typical DC Voltage Translation Characteristics The SN74CB3T16212 operates as a 24-bit bus switch or as a 12-bit bus exchange that provides data exchanging between four signal ports. The select (S0, S1, S2) inputs control the data path of the bus-exchange switch. When the bus-exchange switch is ON, the A port is connected to the B port, allowing bidirectional data flow between ports. When the bus-exchange switch is OFF, a high-impedance state exists between the A and B ports. This device is fully specified for partial-power-down I off The I off feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down, each select input should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. ORDERING INFORMATION T A PACKAGE (1) ORDERABLE PART NUMBER TOP-SIDE MARKING TSSOP DGG Tape and reel SN74CB3T16212DGGR CB3T16212 TVSOP DGV Tape and reel SN74CB3T16212DGVR KR212 C to C VFBGA GQL Tape and reel SN74CB3T16212GQLR KR212 VFBGA ZQL (Pb-free) Tape and reel SN74CB3T16212ZQLR (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.

www.ti.com GQL OR ZQL PACKAGE (TOP VIEW) A B C D E F G H J K 1 2 3 4 5 6 SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER SCDS157A OCTOBER 2003 REVISED FEBRUARY 2005 TERMINAL ASSIGNMENTS A 1A2 1A1 1B1 B 3A1 2A2 2A1 1B2 2B1 2B2 C 4A1 GND 3A2 3B1 GND 3B2 D 5A2 4A2 5A1 4B2 4B1 5B1 E 6A2 6A1 5B2 6B1 F 7A1 7A2 7B1 6B2 G V CC GND 8A1 8B1 GND 7B2 H 8A2 9A1 9A2 9B2 9B1 8B2 J 10A1 10A2 11A1 11B1 10B2 10B1 K 11A2 12A1 12A2 12B2 12B1 11B2 FUNCTION TABLE INPUTS INPUTS/OUTPUTS FUNCTION L L L Z Z Disconnect L L H port Z port port L H L port Z port port L H H Z port port port H L L Z port port port H L H Z Z Disconnect port port H H L port port port port port port H H H port port port port

www.ti.com 12B2 12B1 1B2 1B1 12A2 12A1 1A2 1A1 SW SW SW SW SW SW SW SW SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER SCDS157A OCTOBER 2003 REVISED FEBRUARY 2005 LOGIC DIAGRAM (POSITIVE LOGIC)

www.ti.com A EN (see Note B) B Control Circuit VG (see Note A) ABSOLUTE MAXIMUM RATINGS (1) RECOMMENDED OPERATING CONDITIONS (1) SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER SCDS157A OCTOBER 2003 REVISED FEBRUARY 2005 SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW) Gate voltage G is equal to approximately V CC V T when the switch is ON and V I V CC V T EN is the internal enable signal applied to the switch. over free-air temperature range (unless otherwise noted) MIN MAX UNIT V CC Supply voltage range (2) 0.5 V V IN Control input voltage range (2) (3) 0.5 V V I/O Switch I/O voltage range (2) (3) (4) 0.5 V I IK Control input clamp current V IN mA I I/OK I/O port clamp current V I/O mA I I/O ON-state switch current (5) 128 mA Continuous current through V CC or GND 100 mA DGG package θ JA Package thermal impedance (6) DGV package C/W GQL/ZQL package T stg Storage temperature range 150 C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltages are with respect to ground, unless otherwise specified. (3) The input and output volrage ratings may be exceeded if the input and output clamp-current ratings are observed. (4) V I and V O are used to denote specific conditions for V I/O (5) I I and I O are used to denote specific conditions for I I/O (6) The package thermal impedance is calculated in accordance with JESD 51-7. MIN MAX UNIT V CC Supply voltage 2.3 3.6 V V CC 2.3 V to 2.7 V 1.7 5.5 V IH High-level control input voltage V V CC 2.7 V to 3.6 V 5.5 V CC 2.3 V to 2.7 V 0.7 V IL Low-level control input voltage V V CC 2.7 V to 3.6 V 0.8 V I/O Data input/output voltage 5.5 V T A Operating free-air temperature C (1) All unused control inputs of the device must be held at V CC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs literature number SCBA004.

www.ti.com ELECTRICAL CHARACTERISTICS (1) SWITCHING CHARACTERISTICS SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER SCDS157A OCTOBER 2003 REVISED FEBRUARY 2005 PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT V IK V CC I I mA 1.2 V V OH See Figures and Control I IN V CC 3.6 V IN 3.6 V to 5.5 V or GND µ A inputs V I V CC 0.7 V to 5.5 V I I V CC 3.6 V IN V CC or GND, Switch ON V I 0.7 V to V CC 0.7 V µ A V I to 0.7 V I OZ (3) V CC 3.6 V I V IN V CC or GND, V O to 5.5 Switch OFF µ A I off V CC V I V O to 5.5 V µ A V I V CC or GND V CC 3.6 V IN V CC or GND, I I/O I CC µ A Switch ON or OFF V I 5.5 V Control Δ I CC (4) V CC V to 3.6 One input at V CC 0.6 Other inputs at V CC or GND 300 µ A inputs Control C in V CC 3.3 V IN V CC or GND pF inputs C io(OFF) V CC 3.3 V IN V CC or GND, V I/O 5.5 3.3 or GND, Switch OFF pF V I/O 5.5 V or 3.3 V C io(ON) V CC 3.3 V IN V CC or GND, Switch ON pF V I/O GND I O mA 9.5 V CC 2.3 TYP at V CC 2.5 V I I O mA 9.5 r ON (5) Ω I O mA 8.5 V CC V I I O mA 8.5 (1) V IN and I IN refer to control inputs. V I V O I I and I O refer to data pins. (2) All typical values are at V CC 3.3 V (unless otherwise noted), T A (3) For I/O ports, the parameter I OZ includes the input leakage current. (4) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V CC or GND. (5) Measured by the voltage drop between A and B terminals at the indicated current throught the switch. ON-state resistance is determined by the lower of the voltages of the two or terminals. over operating free-air temperature range (unless otherwise noted) (see Figure V CC 2.5 V V CC 3.3 V FROM TO 0.2 V 0.3 V PARAMETER UNIT (INPUT) (OUTPUT) MIN MAX MIN MAX t pd (1) A or B B or A 0.15 0.25 ns t pd(s) S A 15.5 11.5 ns t en S B ns t dis S B 10.5 ns (1) The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capaitance, when driven by an ideal voltage source (zero output impedance).

www.ti.com PARAMETER MEASUREMENT INFORMATION VOH VOL CL (see Note A) TEST CIRCUIT 2 × VCC Open GND RL RL tPLH tPHL Output Waveform 1 S1 at 2 × VCC (see Note B) Output Waveform 2 S1 at Open (see Note B) tPZL tPZH tPLZ tPHZ VCC 0 V VOH VOL 0 V VOL + VΔ VOH − VΔ 0 V Output Control (VIN) VCC VCC VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (tpd(s)) VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES Output NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ /char????????10 MHz, ZO = 50 Ω , tr ≤/char????????2.5 ns, tf ≤/char????????2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd(s). The tpd propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). H. All parameters and waveforms are not applicable to all devices. 50 Ω VG1 VCC DUT 50 Ω VIN 50 Ω VG2 50 Ω VI TEST RLS1 VΔCL VCC VI tPHZ/tPZH tPLZ/tPZL tpd(s) Open Open 2 × VCC 2 × VCC Open Open 500 Ω 500 Ω 500 Ω 500 Ω 500 Ω 500 Ω

3.6 V or GND

5.5 V or GND

3.6 V 5.5 V 30 pF 50 pF 30 pF 50 pF 30 pF 50 pF 0.15 V 0.3 V 0.15 V 0.3 V Output Control (VIN) Input Generator Input Generator VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VCC/2 VO SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER SCDS157A OCTOBER 2003 REVISED FEBRUARY 2005 Figure Test Circuit and Voltage Waveforms

www.ti.com TYPICAL CHARACTERISTICS V − Output Voltage − V OUTPUT VOLTAGE vs INPUT VOLTAGE O VI − Input Voltage − V V − Output Voltage − V OUTPUT VOLTAGE vs INPUT VOLTAGE O VI − Input Voltage − V 0.0 1.0 2.0 3.0 4.0 0.0 1.0 2.0 3.0 4.0 VCC = 3 V IO = 1 µA TA = 25° C VCC = 2.3 V IO = 1 µA TA = 25° C 1.5 2.0 2.5 3.0 3.5 4.0 1.5 2.0 2.5 3.0 3.5 4.0 1.5 2.0 2.5 3.0 3.5 4.0 V − Output Voltage High − V OUTPUT VOLTAGE HIGH vs SUPPLY VOLTAGE OH VCC − Supply Voltage − V VCC = 2.3 V ~ 3.6 V VI = 5.5 V TA = 85° C OUTPUT VOLTAGE HIGH vs SUPPLY VOLTAGE VCC − Supply Voltage − V VCC = 2.3 V ~ 3.6 V VI = 5.5 V TA = 25° C V − Output Voltage High − VOH 100 µA 8 mA 16 mA 24 mA 100 µA 8 mA 16 mA 24 mA 100 µA 8 mA 16 mA 24 mA OUTPUT VOLTAGE HIGH vs SUPPLY VOLTAGE VCC − Supply Voltage − V VCC = 2.3 V ~ 3.6 V VI = 5.5 V TA = -40° C V − Output Voltage High − VOH SN74CB3T16212 24-BIT FET BUS-EXCHANGE SWITCH, 2.5-V/3.3-V LOW-VOLTAGE BUS SWITCH WITH 5-V-TOLERANT LEVEL SHIFTER SCDS157A OCTOBER 2003 REVISED FEBRUARY 2005 Figure Data Output Voltage vs Data Input Voltage Figure V OH Values

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 74CB3T16212DGGRE4 ACTIVE TSSOP DGG 56 2000 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM 74CB3T16212DGVRE4 ACTIVE TVSOP DGV 56 2000 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM SN74CB3T16212DGGR ACTIVE TSSOP DGG 56 2000 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM SN74CB3T16212DGVR ACTIVE TVSOP DGV 56 2000 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM SN74CB3T16212ZQLR ACTIVE VFBGA ZQL 56 1000 Pb-Free (RoHS) SNAGCU Level-1-260C-UNLIM (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 2-Jun-2005 Addendum-Page 1

MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE

24 PINS SHOWN

3,70 3,50 4,90 5,10 20DIM PINS ** 4073251/E 08/00 1,20 MAX Seating Plane 0,05 0,15 0,25 0,50 0,75 0,23 0,13 11 2 24 13 4,30 4,50 0,16 NOM Gage Plane A 7,90 7,70 382416 4,90 5,103,70 3,50 A MAX A MIN 6,60 6,20 11,20 11,40 9,60 9,80 0,08 M0,070,40 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194

MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 4040078/F 12/97

48 PINS SHOWN

0,25 0,15 NOM Gage Plane 6,00 6,20 8,30 7,90 0,75 0,50 Seating Plane 0,27 0,17 A 1,20 MAX M0,08 0,10 0,50 0°–8° 14,10 13,90 48DIM A MAX A MIN PINS ** 12,40 12,60 17,10 16,90 0,15 0,05 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold protrusion not to exceed 0,15. D. Falls within JEDEC MO-153

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright  2005, Texas Instruments Incorporated