74AVC16836A PHILIPS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 11
Technical content
/C0080 /C0115 /C0111/C0110/C0111 /C0115 74AVC16836A 20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State) Product data Supersedes data of 2000 Aug 03
2002 Aug 02
Philips Semiconductors Product data 74AVC16836A20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State)
22002 Aug 02 853-2211 28696
FEATURES
- Wide supply voltage range of 1.2 V to 3.6 V
- Complies with JEDEC standard no. 8-1A/5/7.
- CMOS low power consumption
- Input/output tolerant up to 3.6 V
- DCO (Dynamic Controlled Output) circuit dynamically changes output impedance, resulting in noise reduction without speed degradation
- Low inductance multiple VCC and GND pins for minimum noise and ground bounce
- Power off disables 74AVC16836A outputs, permitting Live Insertion
- Integrated input diodes to minimize input overshoot and undershoot
- Full PC133 solution provided when used with PCK2509S or PCK2510S and CBT16292
DESCRIPTION
The 74AVC16836A is a 20-bit universal bus driver. Data flow is controlled by output enable (OE), latch enable (LE) and clock inputs (CP). This product is designed to have an extremely fast propagation delay and a minimum amount of power consumption. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor (Live Insertion). A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line drive during transient. See the graphs on page 8 for typical curves. PIN CONFIGURATION 28 29 56OE GND VCC GND Y10 Y11 Y12 GND Y13 Y14 Y15 VCC Y16 Y17 GND Y18 Y19 NC CP GND VCC GND A10 A11 A12 GND A13 A14 A15 VCC A16 A17 GND A18 A19 LE SH00159 QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.0 ns; CL = 30 pF. SYMBOL PARAMETER CONDITIONS TYPICAL UNIT tPHL /tPLH Propagation delay An to Yn VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V 2.4 1.7 1.5 ns tPHL /tPLH Propagation delay LE to Yn; CP to Yn VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V 2.7 2.1 1.7 ns C I Input capacitance 3.8 pF C Power dissipation capacitanceper buffer V = GND to VCC 1 Outputs enabled 25 pFC PD Pow er dissipation capacitance per buffer VI = GND to VCC 1 Output disabled 6 pF NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC 2 × fi + /C0083 (CL × VCC 2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; /C0083 (CL × VCC 2 × fo) = sum of outputs.
ORDERING INFORMATION
56-Pin Plastic 0.5 mm pitch TSSOP –40 to +85 °C 74AVC16836ADGG SOT364-1 56-Pin Plastic 0.4 mm pitch TVSOP –40 to +85 °C 74AVC16836ADGV SOT481-2
Philips Semiconductors Product data 74AVC16836A20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State)
2002 Aug 02 3
PIN NUMBER SYMBOL NAME AND FUNCTION
28 NC No connection
20, 21, 23, 24, 26, 27 Y0 to Y19 Data outputs 46, 53 GND Ground (0V) 7, 22, 35, 50 VCC Positive supply voltage
1 OE Output enable input
(active LOW)
29 LE Latch enable input
(active LOW)
56 CP Clock input
31, 30 A0 to A19 Data inputs LOGIC SYMBOL SH00201 CP LE D OE LE TO THE 17 OTHER CHANNELS CP TYPICAL INPUT (DATA OR CONTROL) SH00200 VCC LOGIC SYMBOL (IEEE/IEC) 1 ∇ 1 552 2C3 EN1 A10 A11 A12 A13 A14 A15 A16 A17 OE CP Y10 Y11 Y12 Y13 Y14 Y15 Y16 Y17 LE C3 SH00160 A18 A19 Y18 Y19 FUNCTION TABLE INPUTS OUTPUTS OE LE CP A OUTPUTS H X X X Z L L X L L L L X H H L H ↑ L L L H ↑ H H L H H X Y01 L H L X Y02 H = HIGH voltage level L = LOW voltage level X = Don’t care Z = High impedance “off” state ↑ = LOW-to-HIGH level transition NOTES: 1. Output level before the indicated steady-state input conditions were established, provided that CP is high before LE goes low. 2. Output level before the indicated steady-state input conditions were established.
Philips Semiconductors Product data 74AVC16836A20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State)
2002 Aug 02 4
The PLL clock distribution device and AVC registered drivers reduce signal loads on the memory controller and prevent timing delays and waveform distortions that would cause unreliable operation SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM AVC16836A PCK2509S or PCK2510SAVC16836A BACK SIDE FRONT SIDE AVC16836A SW00409 RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS MIN MAX UNIT 1.65 1.95 VCC DC supply voltage (according to JEDEC Low Voltage Standards) 2.3 2.7 V VCC 3.0 3.6 DC supply voltage (for low voltage applications) 1.2 3.6 V VI DC Input voltage range 0 3.6 V VO DC output voltage range; output 3-State 0 3.6 VVO DC output voltage range; output HIGH or LOW state 0 VCC V Tamb Operating free-air temperature range –40 +85 °C VCC = 1.65 to 2.3 V 0 30 tr, tf Input rise and fall times VCC = 2.3 to 3.0 V 0 20 ns/V VCC = 3.0 to 3.6 V 0 10 ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS RATING UNIT VCC DC supply voltage –0.5 to +4.6 V IIK DC input diode current VI 0 –50 mA VI DC input voltage For all inputs1 –0.5 to 4.6 V IOK DC output diode current VO VCC or VO 0 /C003450 mA VO DC output voltage; output 3-State Note 1 –0.5 to 4.6 V VO DC output voltage; output HIGH or LOW stateNote 1 –0.5 to VCC +0.5 V IO DC output source or sink current VO = 0 to VCC /C003450 mA IGND , ICC DC V CC or GND current /C0034100 mA Tstg Storage temperature range –65 to +150 °C PTOT Power dissipation per package –plastic thin-medium-shrink (TSSOP) For temperature range: –40 to +125 °C above +55°C derate linearly with 8 mW/K 600 mW NOTE: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors Product data 74AVC16836A20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State)
2002 Aug 02 5
DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V). LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT MIN TYP 1 MAX VCC = 1.2 V VCC – – V HIGH level Input voltage VCC = 1.65 to 1.95 V 0.65VCC 0.9 – VVIH HIGH level Input voltage VCC = 2.3 to 2.7 V 1.7 1.2 – V VCC = 3.0 to 3.6 V 2.0 1.5 – VCC = 1.2 V – – GND V LOW level Input voltage VCC = 1.65 to 1.95 V – 0.9 0.35VCC VVIL LOW level Input voltage VCC = 2.3 to 2.7 V – 1.2 0.7 V VCC = 3.0 to 3.6 V – 1.5 0.8 VCC = 1.65 to 3.6 V; VI = VIH or VIL; VCC 02 0 VCCCC I IH IL IO = –100 µA VCC /C00420.20 VCC – VO H HIGH level output voltage VCC = 1.65 V; VI = VIH or VIL; IO = –4 mA VCC /C00420.45 VCC /C00420.10 – VOH g VCC = 2.3 V; VI = VIH or VIL; IO = –8 mA VCC /C00420.55 VCC /C00420.28 – VCC = 3.0 V; VI = VIH or VIL; IO = –12 mA VCC /C00420.70 VCC /C00420.32 – VCC = 1.65 to 3.6 V; VI = VIH or VIL; GND 02 0CC I IH IL IO = 100 µA – GND 0.20 VO L LOW level output voltage VCC = 1.65 V; VI = VIH or VIL; IO = 4 mA – 0.10 0.45 VOL g VCC = 2.3 V; VI = VIH or VIL; IO = 8 mA – 0.26 0.55 VCC = 3.0 V; VI = VIH or VIL; IO = 12 mA – 0.36 0.70 VCC =36V ;II Input leakage current VCC = 3.6 V; V V or GND – 0.1 2.5 µAII In ut leakage current VI = VCC or GND 0.1 2.5 µA IOFF 3-State output OFF-state currentVCC = 0 V; VI or VO = 3.6 V – 0.1 /C003410 µA IO 3 State output OFF state current VCC = 1.65 to 2.7 V; VI = VIH or VIL; VO = VCC or GND – 0.1 5 µAIOZ 3-State output OFF -state current VCC = 3.0 to 3.6 V; VI = VIH or VIL; VO = VCC or GND – 0.1 10 µA ICC Quiescent supply current VCC = 1.65 to 2.7 V; VI = VCC or GND; IO = 0 – 0.1 20 µAICC Q uiescent supply current VCC = 3.0 to 3.6 V; VI = VCC or GND; IO = 0 – 0.2 40 µA NOTE: 1. All typical values are at Tamb = 25 °C.
Philips Semiconductors Product data 74AVC16836A20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State)
2002 Aug 02 6
GND = 0 V; tr = tf ≤ 2.0 ns; CL = 30 pF LIMITS 1.5 ± 0.1 V VCC =
1.2 V UNIT
MIN TYP 1 MAX MIN TYP 1 MAX MIN TYP 1 MAX MIN MAX TYP Propagation delay An to Yn tPHL /tPLH Propagation delay LE to Yn Propagation delay CP to Yn tPZH /tPZL 3-State output enable time OE to Yn tPHZ /tPLZ 3-State output disable time OE to Yn t CP pulse width HIGH or LOW tW LE pulse width HIGH tS Set-up time An to CP 5, 7 0.2 0 – 0.3 0 – 0.2 0 – 0.3 – 0 ns tSU Set-up time An to LE t Hold time An to CP th Hold time An to LE fmax Maximum clock pulse frequency NOTE:
Philips Semiconductors Product data 74AVC16836A20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State)
2002 Aug 02 7
AC WAVEFORMS FOR V CC = 3.0 V TO 3.6 V RANGE VM = 0.5 VCC VX = VOL + 0.300 V VY = VOH – 0.300 V VOL and VOH are the typical output voltage drop that occur with the output load. V I = VCC AC WAVEFORMS FOR V CC = 2.3 V TO 2.7 V AND VCC < 2.3 V RANGE VM = 0.5 VCC VX = VOL + 0.15 V VY = VOH – 0.15 V VOL and VOH are the typical output voltage drop that occur with the output load. VI = VCC An INPUT tPHL tPLH VOL VI GND VOH Yn OUTPUT SH00132 VM VM NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V Waveform 1. Input (An) to output (Yn) propagation delay LE INPUT Yn OUTPUT VI GND VOH VOL tPHL tPLH tW VM VM VM SH00165 NOTE: VM = 0.5 VCC at VCC = 2.3 to 2.7 V Waveform 2. Latch enable input (LE) pulse width, the latch enable input to output (Yn) propagation delays. CP INPUT Yn OUTPUT VI GND VOH VOL tPHL tPLH tW 1/fMAX SH00135 VM VM VM NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V Waveform 3. The clock (CP) to Yn propagation delays, the clock pulse width and the maximum clock frequency. ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ An INPUT LE INPUT tSU th NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. tSU th VI GND VI GND VM VM SH00166 VM = 0.5VCC at VCC = 2.3 to 2.7 V Waveform 4. Data set-up and hold times for the An input to the LE input VI GND ÉÉÉÉ ÉÉÉÉ ÉÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ An INPUT VI GND VOH Yn OUTPUT VOL CP INPUT tsu th tsu th NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. SH00136 VM VM VM = 0.5VCC at VCC = 2.3 to 2.7 V Waveform 5. Data set-up and hold times for the An input to the clock CP input tPLZ tPZL VI nOE INPUT GND VCC OUTPUT LOW-to-OFF OFF-to-LOW VOL VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs enabled outputs disabled tPHZ VM VM VM tPZH VX VY SH00137NOTE: VM = 0.5VCC at VCC = 2.3 to 2.7 V Waveform 6. 3-State enable and disable times
2002 Aug 02 8
R T = Termination resistance should be equal to ZOUT of pulse generators. Figure 1. Output voltage (VOL ) vs. output current (IOL ) Figure 2. Output voltage (VOH ) vs. output current (IOH )
Philips Semiconductors Product data 74AVC16836A20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State)
2002 Aug 02 9
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm SOT364-1
Philips Semiconductors Product data 74AVC16836A20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State)
2002 Aug 02 10
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 4.4 mm SOT481-2
Philips Semiconductors Product data 74AVC16836A20-bit registered driver with inverted register enable and Dynamic Controlled Outputs (3-State)
2002 Aug 02 11
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Date of release: 08-02 Document order number: 9397 750 10178 /C0080 /C0115 /C0111/C0110/C0111 /C0115 Data sheet status[1] Objective data Preliminary data Product data Product status[2] Development Qualification Production Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Data sheet status [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.