74AUC1G32

74AUC1G32 PHILIPS | Alldatasheet

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Technical content

Preliminary specification File under Integrated Circuits, IC24

2001 Nov 30

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Philips Semiconductors Preliminary specification Single 2-input OR gate 74AUC1G32

FEATURES

• Wide supply voltage range from 0.8 to 2.7 V
• Performance optimised for VCC = 1.8 V
• High noise immunity
• Complies with JEDEC standard: – JESD76 (1.65 to 1.95 V)
• 8 mA output drive (VCC = 1.65 V)
• CMOS low power consumption
• Latch-up performance≤250 mA
• 3.3 V tolerant inputs/outputs
• SC-88A and SC-74A package.

DESCRIPTION

The 74AUC1G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using Ioff. The Ioffcircuitry disables the output, preventing the damaging current backflow through the device when it is powered down. The 74AUC1G32 provides the single 2-input OR function. QUICK REFERENCE DATA GND = 0 V; T amb =2 5°C; input slewrate≥ 1 V/ns. Notes 1. C PD is used to determine the dynamic power dissipation (PD inµW). PD =C PD × VCC 2 × fi+( CL × VCC 2 × fo) where: fi= input frequency in MHz; fo = output frequency in MHz; C L = output load capacitance in pF; VCC = supply voltage in Volts. 2. The condition is VI= GND to VCC . SYMBOL PARAMETER CONDITIONS TYPICAL UNIT tPHL /tPLH propagation delay inputs A and B to output Y VCC = 1.2 V; CL = 15 pF; RL =2k Ω ns VCC = 1.5 V; CL = 15 pF; RL =2k Ω ns VCC = 1.8 V; CL = 30 pF; RL =1 kΩ ns VCC = 2.5 V; CL = 30 pF; RL = 500Ω ns C I input capacitance 4 pF C PD power dissipation capacitance per buffer VCC = 1.8 V; notes 1 and 2 14 pF

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Philips Semiconductors Preliminary specification Single 2-input OR gate 74AUC1G32 FUNCTION TABLE See note 1. Note 1. H = HIGH voltage level; L = LOW voltage level.

ORDERING INFORMATION

RANGE PINS PACKAGE MATERIAL CODE MARKING 74AUC1G32GW −40 to +85°C 5 SC-88A plastic SOT353 FG 74AUC1G32G W −40 to +85 °C 5 SC-74A plastic t.b.f. F32 PIN SYMBOL DESCRIPTION

1 B data input B

2 A data input A

3 GND ground (0 V)

4 Y data output Y

handbook, halfpage MNA163 VCC A YGND B Fig.1 Pin configuration. handbook, halfpage MNA164 B A Y 1 4 Fig.2 Logic symbol.

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Philips Semiconductors Preliminary specification Single 2-input OR gate 74AUC1G32 handbook, halfpage MNA165 4≥1 Fig.3 IEE/IEC logic symbol. handbook, halfpage MNA166 B A Y Fig.4 Logic diagram. RECOMMENDED OPERATING CONDITIONS LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When V CC =0 (Powered-down mode), the output voltage can be 2.7 V in normal operation. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage 0.8 2.7 V VI input voltage 0 2.7 V VO output voltage active mode 0 V CC V VCC = 0 V; Power-down mode 0 2.7 V Tamb operating ambient temperature −40 +85 °C tr,tf (Δt/Δf) input rise and fall times 0 20 ns/V SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage −0.5 +3.6 V IIK input diode current V I<0 −− 50 mA VI input voltage note 1 −0.5 +3.6 V IOK output diode current V O >V CC or VO <0 −± 50 mA VO output voltage active mode; notes 1 and 2 −0.5 V CC + 0.5 V Power-down mode; notes 1 and 2−0.5 +3.6 V IO output source or sink current VO =0t oVCC −± 60 mA ICC , IGND VCC or GND current −± 100 mA Tstg storage temperature −65 +150 °C PD power dissipation per package for temperature range from −40 to +85°C − 250 mW

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Philips Semiconductors Preliminary specification Single 2-input OR gate 74AUC1G32 DC CHARACTERISTICS At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Note 1. All typical values are at VCC = 1.8 V and Tamb =2 5°C. SYMBOL PARAMETER TEST CONDITIONS T amb (°C) UNIT OTHER V CC (V) −40 to +85 MIN. TYP. (1) MAX. VIH HIGH-level input voltage

0.8 V CC −− V

1.1 to 2.3 0.65× VCC −− V VIL LOW-level input voltage 0.8 −− GND V 1.1 to 2.3 −− 0.35× VCC V VOH HIGH-level output voltage VI=V IH or VIL; IO = −100 µA 0.8 to 2.7 V CC − 0.1 −− V VI=V IH or VIL; IO =− 700 µA 0.8 − 0.55 − V VI=V IH or VIL; IO =− 3 mA 1.1 V CC − 0.3 −− V VI=V IH or VIL; IO = −5 mA 1.5 V CC − 0.4 −− V VI=V IH or VIL; IO = −8 mA 1.65 V CC − 0.45 −− V VI=V IH or VIL; IO = −9 mA 2.3 1.8 −− V VOL LOW-level output voltage VI=V IH or VIL; IO = 100µA 0.8 to 2.7 −− 0.2 V VI=V IH or VIL; IO = 700µA 0.8 − 0.25 − V VI=V IH or VIL; IO = 3 mA 1.1 −− 0.3 V VI=V IH or VIL; IO = 5 mA 1.5 −− 0.4 V VI=V IH or VIL; IO = 8 mA 1.65 −− 0.45 V VI=V IH or VIL; IO = 9 mA 2.3 −− 0.6 V II input leakage current VI=V CC or GND 0 to 2.7 −± 0.1 ±5 µA Ioff power OFF leakage current VIor VO = 2.7 V 0 −± 0.1 ±10 µA ICC quiescent supply current VI=V CC or GND; IO = 0 0.8 to 2.7 − 0.1 10 µA

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Philips Semiconductors Preliminary specification Single 2-input OR gate 74AUC1G32 AC CHARACTERISTICS GND = 0 V; input slewrate≥ 1 V/ns. AC WAVEFORMS SYMBOL PARAMETER TEST CONDITIONS T amb (°C) UNIT WAVEFORMS V CC (V) C L(pF) R L(kΩ ) −40 to +85 MIN. TYP. MAX. tPHL /tPLH propagation delay inputs A and B to output Y see Figs 5 and 6 0.8 15 2 − ns 1.1 to 1.3 15 2 1.0 ns 1.4 to 1.6 15 2 1.0 ns 1.65 to 1.95 30 1 1.0 ns 2.3 to 2.7 30 0.5 1.0 ns handbook, halfpage MNA167 A, B input Y output tPHL tPLH VM VM Fig.5 Inputs A, B to output Y propagation delay times. VOL and VOH are typical output voltage drop that occur with the output load. VCC VM INPUT VI Slewrate 0.8 to 2.7 V 0.5 × VCC VCC ≥ 1 V/ns

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Philips Semiconductors Preliminary specification Single 2-input OR gate 74AUC1G32 handbook, full pagewidth VEXT VCC VI VO MNA616 D.U.T. C LR T R L R L PULSE GENERATOR Fig.6 Load circuitry for switching times. Definitions for test circuits: R L = Load resistor. C L = Load capacitance including jig and probe capacitance (see Chapter “AC characteristics”). R T = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT VCC VI C L R L TPLH /TPHL TPZH /TPHZ TPZL /TPLZ <1.65 V V CC 15 pF 2 k Ω open GND 2 × VCC 1.65 to 1.95 V VCC 30 pF 1 k Ω open GND 2 × VCC 2.3 to 2.7 V V CC 30 pF 0.5 k Ω open GND 2 × VCC

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Philips Semiconductors Preliminary specification Single 2-input OR gate 74AUC1G32 PACKAGE OUTLINE REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ SOT353 wB Mbp D e A Lp Q detail X H E E v M A AB y 0 1 2 mm scale c X 13 2 Plastic surface mounted package; 5 leads SOT353 UNIT A 1 max bp cD E (2) e1 H E Lp Qy wv mm 0.1 0.30 0.20 2.2 1.8 0.25 0.10 1.35 1.15 0.65 e 1.3 2.2 2.0 0.2 0.10.2 DIMENSIONS (mm are the original dimensions) 0.45 0.15 0.25 0.15 A 1.1 0.8 97-02-28SC-88A

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Philips Semiconductors Preliminary specification Single 2-input OR gate 74AUC1G 32 PACKAGE OUTLINE REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ wB Mbp D e A Lp Q detail X H E E v M A AB y 0 1 2 mm scale c X 13 2 4 5 Plastic surface mounted package; 5 leads SC-74A UNIT A 1 max bp cD E (2) e1 H E Lp Qy w v mm 0.095 0.36 0.28 3.05 2.85 0.16 0.11 1.6 0.95 e 1.9 2.95 DIMENSIONS (mm are the original dimensions) 0.29 0.24 A 1.045 0.965 97-02-28SC-74A

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Philips Semiconductors Preliminary specification Single 2-input OR gate 74AUC1G32 SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250°C. The top-surface temperature of the packages should preferable be kept below 220°C for thick/large packages, and below 235°C for small/thin packages. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:

• Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave.
• For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis ispreferred to be parallel to the transport direction of the printed-circuit board; – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
• For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250°C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320°C.

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Philips Semiconductors Preliminary specification Single 2-input OR gate 74AUC1G32 Suitability of surface mount IC packages for wave and reflow soldering methods Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “DataHandbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. PACKAGE SOLDERING METHOD WAVE REFLOW (1) BGA, HBGA, LFBGA, SQFP , TFBGA not suitable suitable HBCC, HLQFP , HSQFP , HSOP , HTQFP , HTSSOP , HVQFN, SMS not suitable (2) suitable PLCC (3), SO, SOJ suitable suitable LQFP , QFP , TQFP not recommended (3)(4) suitable SSOP , TSSOP , VSO not recommended (5) suitable

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Philips Semiconductors Preliminary specification Single 2-input OR gate 74AUC1G32 DATA SHEET STATUS Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DATA SHEET STATUS PRODUCT STATUS DEFINITIONS (1) Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.