74ALS175 PHILIPS | Alldatasheet
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Technical content
/C0109 /C0110 /C0114 74ALS175 Quad D flip–flop Product specification IC05 Data Handbook
1991 Feb 08
Philips Semiconductors Product specification 74ALS175Quad D flip-flop
21991 Feb 08 853–1024 01670
FEATURES
- Four edge-triggered D flip-flops
- Buffered common clock
- Buffered asynchronous master reset
- True and complementary outputs
DESCRIPTION
The 74ALS175 is a quad, edge-triggered D-type flip-flops with individual D inputs and both Q and Q outputs. The common buffered clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition is transferred to the corresponding flip-flop’s Q output. All Q outputs will be forced Low independent of clock or data inputs by a Low voltage level on the MR input. The device is useful for applications where both true and complement outputs are required, and the clock and master reset are common to all storage elements. TYPE TYPICAL fMAX TYPICAL SUPPLY CURRENT (TOTAL) 74ALS175 70MHz 7mA PIN CONFIGURATION 107 VCC SF00718 Q 3 Q 2 CP MR Q 0 Q 1 GND
ORDERING INFORMATION
DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C DRAWING NUMBER 16-pin plastic DIP 74ALS175N SOT38-4 16-pin plastic SO 74ALS175D SOT109-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS DESCRIPTION 74ALS (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW D0 – D3 Data inputs 1.0/1.0 20µA/0.1mA CP Clock Pulse input (active rising edge) 1.0/1.0 20µA/0.1mA MR Master Reset input (active-Low) 1.0/1.0 20µA/0.1mA Q0 – Q3 True outputs 20/80 0.4mA/8mA Q 0 – Q3 Complementary outputs 20/80 0.4mA/8mA NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state. LOGIC SYMBOL VCC = Pin 16 GND = Pin 8 SF00719 4 5 12 13 D0 D1 D2 D3 CP MR 2 3 7 6 10 11 15 14 Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 IEC/IEEE SYMBOL R SF00720
Philips Semiconductors Product specification 74ALS175Quad D flip-flop
1991 Feb 08 3
VCC = Pin 16 GND = Pin 8 CP DQ RD CP DQ RD CP DQ RD CP Q SF00721 CP MR 32 6 1 1 1 0 1 4 1 5 7 Q 0Q 0 Q 1Q 1 Q 2Q 2 Q 3Q 3 FUNCTION TABLE INPUTS OUTPUTS OPERATING MR CP D Q n Q n MODE L X X L H Reset (clear) H ↑ h H L Load “1” H ↑ I L H Load “0” NOTES: H = High-voltage level h = High state must be present one setup time before the Low-to-High clock transition L = Low-voltage level l = Low state must be present one setup time before the Low-to-High clock transition X = Don’t care ↑ = Low-to-High clock transition ABSOLUTE MAXIMUM RATINGS (Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL PARAMETER RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to VCC V IOUT Current applied to output in Low output state 16 mA Tamb Operating free-air temperature range 0 to +70 °C Tstg Storage temperature range –65 to +150 °C RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS UNITSYMBOL PARAMETER MIN NOM MAX UNIT VCC Supply voltage 4.5 5.0 5.5 V VIH High-level input voltage 2.0 V VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –0.4 mA IOL Low-level output current 8 mA Tamb Operating free-air temperature range 0 +70 °C
Philips Semiconductors Product specification 74ALS175Quad D flip-flop
1991 Feb 08 4
DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) SYMBOL PARAMETER TEST CONDITIONS 1 LIMITS UNITSYMBOL PARAMETER TEST CONDITIONS 1 MIN TYP 2 MAX UNIT VOH High-level output voltage VCC ±10%, VIL = MAX, VIH = MIN, IOH = MAX VCC – 2 V VO Low level output voltage VCC = MIN, VIL = MAX, IOL = 4mA 0.25 0.4 V VOL Low-level output voltage CC , IL , VIH = MIN IOL = 8mA 0.35 0.50 V VIK Input clamp voltage VCC = MIN, II = IIK –0.73 –1.5 V II Input current at maximum input voltageVCC = MAX, VI = 7.0V 100 µA IIH High-level input current VCC = MAX, VI = 2.7V 20 µA IIL Low-level input current VCC = MAX, VI = 0.5V –0.1 mA IO Output current3 VCC = MAX, VO = 2.25V –30 –112 mA ICC Supply current (total) VCC = MAX 7 14 mA NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS . AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = 0°C to +70°C VCC = +5.0V ± 10% C L = 50pF, RL = 500Ω UNIT MIN MAX fMAX Maximum clock frequency Waveform 1 60 MHz tPLH tPHL Propagation delay CP to Qn or CP to Qn Waveform 1 3.0 5.0 13.0 16.0 ns tPLH Propagation delay, MR to Qn Waveform 2 3.0 13.0 ns tPHL Propagation delay, MR to Qn Waveform 2 8.0 18.0 ns AC SETUP REQUIREMENTS LIMITS SYMBOL PARAMETER TEST CONDITION Tamb = 0°C to +70°C VCC = +5.0V ± 10% C L = 50pF, RL = 500Ω UNIT MIN MAX tsu(H) tsu(L) Setup time, High or Low Dn to CP Waveform 3 6.0 6.0 ns th(H) th(L) Hold time, High or Low Dn to CP Waveform 3 0.0 0.0 ns tw (H) tw (L) CP pulse width, High or Low Waveform 1 8.0 8.0 ns tw (L) MR pulse width, Low Waveform 2 6.0 ns tREC Recovery time, MR to CP Waveform 2 6.0 ns
Philips Semiconductors Product specification 74ALS175Quad D flip-flop
1991 Feb 08 5
For all waveforms, VM = 1.3V. The shaded areas indicate when the input is permitted to change for predictable output performance. CP VM VMVM tw (H) 1/fmax VMVM tPLHtw (L)tPHL Q n VMVMQ n tPLH tPHL SF00722 Waveform 1. Propagation Delay for Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency CP VM VM VMVM tPHL tREC MR Q n tw (L) VMQ n tPLH SF00723 Waveform 2. Master Reset Pulse Width, Master Reset to Output Delay, and Master Reset to Clock Recovery Time th(H)tsu(H) CP SC00064 VM VM VMVMVM VM th(L)tsu(L) Dn Waveform 3. Data Setup and Hold Times TEST CIRCUIT AND WAVEFORMS tw 90% VM 10% 90% VM 10% 90% VM 10% 90% VM 10% NEGATIVE PULSE POSITIVE PULSE tw AMP (V) 0.3V 0.3V tTHL (tff) INPUT PULSE REQUIREMENTS Rep.Rate tw tTLH tTHL 1MHz 500ns 2.0ns 2.0ns Input Pulse Definition VCC Family 74ALS D.U.T.PULSE GENERATOR R LC LR T VIN VOUT Test Circuit for Totem-pole Outputs DEFINITIONS: R L = Load resistor; see AC electrical characteristics for value. C L = Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value. R T = Termination resistance should be equal to ZOUT of pulse generators. tTHL (tf ) tTLH (tr ) tTLH (tr ) AMP (V) Amplitude 3.5V 1.3V VM SC00005
Philips Semiconductors Product specification 74ALS175Quad D flip–flop
1991 Feb 08 6
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
Philips Semiconductors Product specification 74ALS175Quad D flip–flop
1991 Feb 08 7
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
Philips Semiconductors Product specification 74ALS175Quad D flip–flop
1991 Feb 08 8
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Preliminary Specification Product Specification Formative or in Design Preproduction Product Full Production This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Copyright Philips Electronics North America Corporation 1997 All rights reserved. Printed in U.S.A. /C0109 /C0110 /C0114