74AHC126BQ | DigiCamel IC Datasheet

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74AHC126_09 NXP | Alldatasheet

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Technical content

General description The 74AHC126; 74AHCT126 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is speciﬁed in compliance with JEDEC standard No. 7-A. The 74AHC126; 74AHCT126 provides four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A LOW-level at pin nOE causes the outputs to assume a high-impedance OFF-state. The 74AHC126; 74AHCT126 is identical to the 74AHC125; 74AHCT125 but has active HIGH output enable inputs. 2. Features n Balanced propagation delays n All inputs have Schmitt-trigger action n Inputs accept voltages higher than VCC n Input levels: u For 74AHC126: CMOS level u For 74AHCT126: TTL level n ESD protection: u HBM JESD22-A114E exceeds 2000 V u MM JESD22-A115-A exceeds 200 V u CDM JESD22-C101C exceeds 1000 V n Multiple package options n Speciﬁed from−40 °C to +85°C and from−40 °C to +125°C 74AHC126; 74AHCT126 Quad buffer/line driver; 3-state Rev. 04 — 12 August 2009 Product data sheet

1 EN1

5.1 Pinning

5.2 Pin description

Table 2. Pin description

74AHC_AHCT126_4 © NXP B.V. 2009. All rights reserved. Z = high-impedance OFF-state. [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO14 packages: above 70°C the value of Ptotderates linearly at 8 mW/K. For TSSOP14 packages: above 60°C the value of Ptotderates linearly at 5.5 mW/K. For DHVQFN14 packages: above 60°C the value of Ptotderates linearly at 4.5 mW/K. Table 3. Function table[1] Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Recommended operating conditions

Table 5. Operating conditions Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

74AHC_AHCT126_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 12 August 2009 8 of 15 NXP Semiconductors 74AHC126; 74AHCT126 Quad buffer/line driver; 3-state [1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). [2] tpd is the same as tPLH and tPHL . [3] ten is the same as tPZL and tPZH . [4] tdis is the same as tPLZ and tPHZ . [5] C PD is used to determine the dynamic power dissipation (PD inµW). PD =C PD × VCC 2 × fi× N+ Σ(CL × VCC 2 × fo) where: fi= input frequency in MHz; fo = output frequency in MHz; C L = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × fo) = sum of the outputs. 11. Waveforms Measurement points are given inTable8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Input to output propagation delays mna237 tPHL tPLH VM VMnA input nY output GND VI VOH VOL Measurement points are given inTable8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. Enable and disable times mna949 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH nOE input VOL VOH VCC VI VM GND GND tPZL tPZH VM VM

74AHC_AHCT126_4 © NXP B.V. 2009. All rights reserved. Table 8. Measurement points Test data is given inTable9. T = termination resistance should be equal to output impedance Zo of the pulse generator. C L = load capacitance including jig and probe capacitance. Table 9. Test data

74AHC_AHCT126_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 12 August 2009 10 of 15 NXP Semiconductors 74AHC126; 74AHCT126 Quad buffer/line driver; 3-state 12. Package outline Fig 9. Package outline SOT108-1 (SO14) UNIT A max. A 1 A 2 A 3 bp cD (1) E (1) (1)eH E LL p QZ ywv q REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 SOT108-1 X w M q AA 1 A 2 bp D H E Lp Q detail X E Z e c L v M A (A )3 A y 076E06 MS-012 pin 1 index 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.35 0.34 0.16 0.15 0.05 1.05 0.0410.244 0.228 0.028 0.024 0.028 0.0120.01 0.25 0.01 0.0040.039 0.016 99-12-27 03-02-19 0 2.5 5 mm scale SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

74AHC_AHCT126_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 12 August 2009 11 of 15 NXP Semiconductors 74AHC126; 74AHCT126 Quad buffer/line driver; 3-state Fig 10. Package outline SOT402-1 (TSSOP14) UNIT A 1 A 2 A 3 bp cD (1) E (2) (1)eH E LL p QZ ywv q REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.72 0.38 o o0.13 0.10.21 DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 SOT402-1 MO-153 99-12-27 03-02-18 w M bp D Z e 0.25 14 8 q AA 1 A 2 Lp Q detail X L (A )3 H E E c v M A XA y 0 2.5 5 mm scale TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 A max. 1.1 pin 1 index

74AHC_AHCT126_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 12 August 2009 12 of 15 NXP Semiconductors 74AHC126; 74AHCT126 Quad buffer/line driver; 3-state Fig 11. Package outline SOT762-1 (DHVQFN14) terminal 1 index area 0.51 A 1 EhbUNIT ye 0.2 c REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 3.1 2.9 D h 1.65 1.35 2.6 2.4 1.15 0.85 20.30 0.18 0.05 0.00 0.05 0.1 DIMENSIONS (mm are the original dimensions) 0.5 0.3 L 0.1 v 0.05 w 0 2.5 5 mm scale SOT762-1 DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x 0.85 mm A (1) max. A c detail X yy1 Ce L Eh D h e b 13 9 X D E C B A 02-10-17 03-01-27 terminal 1 index area AC C Bv M w M E (1) Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. D (1)

Added type numbers 74AHC126BQ and 74AHCT126BQ (DHVQFN14 package) 74AHC_AHCT126_3 20080425 Product data sheet - 74AHC_AHCT126_2 74AHC_AHCT126_2 19990929 Product speciﬁcation - 74AHC_AHCT126_N_1 74AHC_AHCT126_N_1 19990112 Preliminary speciﬁcation - -

15.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Deﬁnitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

15.2 Deﬁnitions

Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modiﬁcations or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the full data sheet shall prevail.

15.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation speciﬁcations and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the speciﬁed use without further testing or modiﬁcation. Limiting values —Stress above one or more limiting values (as deﬁned in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/proﬁle/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conﬂict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control —This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

15.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit:http://www.nxp.com For sales ofﬁce addresses, please send an email to:salesaddresses@nxp.com Document status[1][2] Product status[3] Deﬁnition Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development. Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation. Product [short] data sheet Production This document contains the product speciﬁcation.

NXP Semiconductors 74AHC126; 74AHCT126 Quad buffer/line driver; 3-state © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 12 August 2009 Document identifier: 74AHC_AHCT126_4 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 17. Contents

Product Information

74AHC126BQ specifications and overview.

Summary

Quad buffer/line driver; 3-state Rev. 04-12 August 2009

Description

Quad buffer/line driver; 3-state Rev. 04-12 August 2009

Source title 74AHC126BQ Datasheet(PDF) - NXP Semiconductors

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