74AHC08 NXP | Alldatasheet

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Technical content

The 74AHC08; 74AHCT08 provides the quad 2-input AND function. Table 1. Ordering information

74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 14 November 2007 2 of 14 NXP Semiconductors 74AHC08; 74AHCT08 Quad 2-input AND gate 4. Functional diagram 5. Pinning information

5.1 Pinning

Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate) mna222 1 3 4 6 9 8 12 11 mna223 mna221 A B Y (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 1A V CC 1B 4B 1Y 4A 2A 4Y 2B 3B 2Y 3A GND 3Y 001aac945 7 8 001aac946 GND(1) Transparent top view 2Y 3A 2B 3B 2A 4Y 1Y 4A 1B 4B GND VCC 6 9 5 10 4 11 3 12 2 13 terminal 1 index area

74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved.

5.2 Pin description

Table 2. Pin description Table 3. Function selection[1] Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved. [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] Ptot derates linearly with 8 mW/K above 70°C. [3] Ptot derates linearly with 5.5 mW/K above 60°C. [4] Ptot derates linearly with 4.5 mW/K above 60°C.

  1. Recommended operating conditions

Table 4. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V).

74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved. Table 6. Static characteristics …continued Voltages are referenced to GND (ground = 0 V).

74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved. [1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). [2] tpd is the same as tPLH and tPHL . [3] C PD is used to determine the dynamic power dissipation (PD inµW). L × VCC 2 × fo) = sum of the outputs. Table 7. Dynamic characteristics GND = 0 V; For test circuit seeFigure7.

74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved. Measurement points are given inTable8. VOL and VOH are typical voltage output levels that occur with the output load. Table 8. Measurement points

74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved. Test data is given inTable9. T = Termination resistance should be equal to output impedance Zo of the pulse generator. C L = Load capacitance including jig and probe capacitance. Table 9. Test data

74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 14 November 2007 9 of 14 NXP Semiconductors 74AHC08; 74AHCT08 Quad 2-input AND gate 12. Package outline Fig 8. Package outline SOT108-1 (SO14) UNIT A max. A 1 A 2 A 3 bp cD (1) E (1) (1)eH E LL p QZ ywv q REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 o o 0.25 0.1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 SOT108-1 X w M q AA 1 A 2 bp D H E Lp Q detail X E Z e c L v M A (A )3 A y 076E06 MS-012 pin 1 index 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.35 0.34 0.16 0.15 0.05 1.05 0.0410.244 0.228 0.028 0.024 0.028 0.0120.01 0.25 0.01 0.0040.039 0.016 99-12-27 03-02-19 0 2.5 5 mm scale SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 14 November 2007 10 of 14 NXP Semiconductors 74AHC08; 74AHCT08 Quad 2-input AND gate Fig 9. Package outline SOT402-1 (TSSOP14) UNIT A 1 A 2 A 3 bp cD (1) E (2) (1)eH E LL p QZ ywv q REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.72 0.38 o o0.13 0.10.21 DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 SOT402-1 MO-153 99-12-27 03-02-18 w M bp D Z e 0.25 14 8 q AA 1 A 2 Lp Q detail X L (A )3 H E E c v M A XA y 0 2.5 5 mm scale TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 A max. 1.1 pin 1 index

74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 14 November 2007 11 of 14 NXP Semiconductors 74AHC08; 74AHCT08 Quad 2-input AND gate Fig 10. Package outline SOT762-1 (DHVQFN14) terminal 1 index area 0.51 A 1 EhbUNIT ye 0.2 c REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 3.1 2.9 D h 1.65 1.35 2.6 2.4 1.15 0.85 20.30 0.18 0.05 0.00 0.05 0.1 DIMENSIONS (mm are the original dimensions) 0.5 0.3 L 0.1 v 0.05 w 0 2.5 5 mm scale SOT762-1 DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x 0.85 mm A (1) max. A c detail X yy1 Ce L Eh D h e b 13 9 X D E C B A 02-10-17 03-01-27 terminal 1 index area AC C Bv M w M E (1) Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. D (1)

74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved. Table 10. Abbreviations Table 11. Revision history

  • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors.
  • Legal texts have been adapted to the new company name where appropriate.
  • Section3: DHVQFN14 package added.
  • Section7: derating values added for DHVQFN14 package.
  • Section12: outline drawing added for DHVQFN14 package. 74AHC_AHCT08_2 19990924 Product specification - 74AHC_AHCT08_1 74AHC_AHCT08_1 19981218 Product specification - -

74AHC_AHCT08_3 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 — 14 November 2007 13 of 14 NXP Semiconductors 74AHC08; 74AHCT08 Quad 2-input AND gate 15. Legal information

15.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

15.2 Definitions

Draft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

15.3 Disclaimers

General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use —NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values —Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

15.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For additional information, please visit:http://www.nxp.com For sales office addresses, send an email to:salesaddresses@nxp.com Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

NXP Semiconductors 74AHC08; 74AHCT08 Quad 2-input AND gate © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 14 November 2007 Document identifier: 74AHC_AHCT08_3 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 17. Contents