SN54ABT16244 TI | Alldatasheet
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SN54ABT16244. . . WD PACKAGE SN74ABT16244A. . . DGG, DGV, OR DL PACKAGE (TOP VIEW) 1OE 1Y1 1Y2 GND 1Y3 1Y4 V CC 2Y1 2Y2 GND 2Y3 2Y4 3Y1 3Y2 GND 3Y3 3Y4 V CC 4Y1 4Y2 GND 4Y3 4Y4 4OE 2OE 1A1 1A2 GND 1A3 1A4 V CC 2A1 2A2 GND 2A3 2A4 3A1 3A2 GND 3A3 3A4 V CC 4A1 4A2 GND 4A3 4A4 3OE To ensure the high-impedance state during power up or power down, OE should be tied to V CC through a pullup SN54ABT16244, SN74ABT16244A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS073H SEPTEMBER 1991 REVISED AUGUST 2005 Members of the Texas Instruments Widebus Family State-of-the-Art EPIC-IIB BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JESD Typical V OLP (Output Ground Bounce) V at V CC T A C Distributed V CC and GND Pin Configuration Minimizes High-Speed Switching Noise Flow-Through Architecture Optimizes PCB Layout High-Drive Outputs 32-mA I OH 64-mA I OL Package Options Include Plastic 300-mil Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), and Thin Very Small-Outline (DGV) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings The SN54ABT16244 and SN74ABT16244A are 16-bit buffers and line drivers designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical OE (active-low output-enable) inputs. resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT16244 is characterized for operation over the full military temperature range of C to 125 The SN74ABT16244A is characterized for operation from C to FUNCTION TABLE (EACH BUFFER) INPUTS OUTPUT Y OE A L H H L L L H X Z Please be aware that an important notice concerning availability, standard warranty, and use in critical
applications
sheet. Widebus, EPIC-IIB are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright 1991 2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas On products compliant to MIL-PRF-38535, all parameters are Instruments standard warranty. Production processing does not tested unless otherwise noted. On all other products, production necessarily include testing of all parameters. processing does not necessarily include testing of all parameters.
www.ti.com 1A1 1A2 1A3 1A4 1Y1 1Y2 1Y3 1Y4 2A1 2A2 2A3 2A4 2Y1 2Y2 2Y3 2Y4 3A1 3A2 3A3 3A4 3Y1 3Y2 3Y3 3Y4 4A1 4A2 4A3 4A4 4Y1 4Y2 4Y3 4Y4 EN1 EN4 1OE 2OE 3OE 4OE EN2 EN3 (1) This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. SN54ABT16244, SN74ABT16244A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS073H SEPTEMBER 1991 REVISED AUGUST 2005 LOGIC SYMBOL (1)
www.ti.com 1OE 1A1 1A2 1A3 1A4 1Y1 1Y2 1Y3 1Y4 2OE 2A1 2A2 2A3 2A4 2Y1 2Y2 2Y3 2Y4 3OE 3A1 3A2 3A3 3A4 3Y1 3Y2 3Y3 3Y4 4OE 4A1 4A2 4A3 4A4 4Y1 4Y2 4Y3 4Y4 Absolute Maximum Ratings (1) SN54ABT16244, SN74ABT16244A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS073H SEPTEMBER 1991 REVISED AUGUST 2005 LOGIC DIAGRAM (POSITIVE LOGIC) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT V CC Supply voltage range 0.5 V V I Input voltage range (2) 0.5 V V O Voltage range applied to any output in the high or power-off state 0.5 5.5 V SN54ABT16244 I O Current into any output in the low state mA SN74ABT16244A 128 I IK Input clamp current V I mA I OK Output clamp current V O mA DGG package θ JA Package thermal impedance (3) DGV package C/W DL package T stg Storage temperature range 150 C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability (2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. (3) The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD 51.
www.ti.com Recommended Operating Conditions (1) Electrical Characteristics SN54ABT16244, SN74ABT16244A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS073H SEPTEMBER 1991 REVISED AUGUST 2005 SN54ABT16244 SN74ABT16244A UNIT MIN MAX MIN MAX V CC Supply voltage 4.5 5.5 4.5 5.5 V V IH High-level input voltage V V IL Low-level input voltage 0.8 0.8 V V I Input voltage V CC V CC V I OH High-level output current mA I OL Low-level output current mA Δ Δ v Input transition rise or fall rate Outputs enabled ns/V T A Operating free-air temperature 125 C (1) All unused inputs of the device must be held at V CC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs literature number SCBA004. over recommended operating free-air temperature range (unless otherwise noted) T A C (1) SN54ABT16244 SN74ABT16244A PARAMETER TEST CONDITIONS UNIT MIN TYP (2) MAX MIN MAX MIN MAX V IK V CC 4.5 I I mA 1.2 1.2 1.2 V V CC 4.5 I OH mA 2.5 2.5 2.5 V CC I OH mA V OH V I OH mA V CC 4.5 V I OH mA (3) I OL mA 0.55 0.55 V OL V CC 4.5 V V I OL mA 0.55 (3) 0.55 V hys 100 mV I I V CC 5.5 V I V CC or GND µ A I OZH V CC 5.5 V O 2.7 V (4) (4) µ A I OZL V CC 5.5 V O 0.5 V (4) (4) µ A I off V CC V I or V O 5.5 V 100 100 µ A V CC 5.5 I CEX Outputs high µ A V O 5.5 V I O (5) V CC 5.5 V O 2.5 V 100 180 180 180 mA Outputs high V CC 5.5 I CC I O Outputs low mA V I V CC or GND Outputs disabled V CC 5.5 Outputs enabled 0.05 1.5 0.05 Data One input at 3.4 inputs Other inputs at Outputs disabled 0.05 0.05 Δ I CC (6) mA V CC or GND Control V CC 5.5 One input at 3.4 0.05 1.5 0.05 inputs Other inputs at V CC or GND C i V I 2.5 V or 0.5 V pF C o V O 2.5 V or 0.5 V pF (1) Characteristics for T A C apply to the SN74ABT16244A only. (2) All typical values are at V CC (3) On products compliant to MIL-PRF-38535, this parameter does not apply. (4) This data-sheet limit may vary among suppliers. (5) Not more than one output should be tested at a time, and the duration of the test should not exceed one second. (6) This is the increase in supply current for each input that is at the specified TTL voltage level rather than V CC or GND.
www.ti.com Switching Characteristics Switching Characteristics SN54ABT16244, SN74ABT16244A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS073H SEPTEMBER 1991 REVISED AUGUST 2005 over recommended ranges of supply voltage and operating free-air temperature, C L pF (unless otherwise noted) (see Figure SN54ABT16244 FROM TO V CC PARAMETER UNIT (INPUT) (OUTPUT) T A C MIN MAX MIN TYP MAX t PLH 0.7 2.3 3.2 0.7 3.6 A Y ns t PHL 0.5 2.6 3.7 0.5 4.2 t PZH 0.7 0.7 4.9 OE Y ns t PZL 0.9 3.2 5.5 0.9 6.5 t PHZ 1.7 3.6 1.7 OE Y ns t PLZ 1.5 2.9 4.7 1.5 5.7 over recommended ranges of supply voltage and operating free-air temperature, C L pF (unless otherwise noted) (see Figure SN74ABT16244A FROM TO V CC PARAMETER UNIT (INPUT) (OUTPUT) T A C MIN MAX MIN TYP MAX t PLH 2.3 3.2 3.5 A or B Y ns t PHL 2.6 3.7 4.1 t PZH 3.8 4.8 OE Y ns t PZL 3.2 4.8 t PHZ 3.6 4.4 4.8 OE Y ns t PLZ 2.9 3.7 4.1
www.ti.com PARAMETER MEASUREMENT INFORMATION 1.5 V thtsu From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT 7 V Open GND 500 Ω 500 Ω Data Input Timing Input 1.5 V 3 V 0 V 1.5 V 1.5 V 3 V 0 V 3 V 0 V 1.5 V tw Input VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOLTAGE WAVEFORMS PULSE DURATION tPLH tPHL tPHL tPLH VOH VOH VOL VOL 1.5 V 1.5 V 3 V 0 V 1.5 V1.5 V Input 1.5 V Output Control Output Waveform 1 S1 at 7 V (see Note B) Output Waveform 2 S1 at Open (see Note B) VOL VOH tPZL tPZH tPLZ tPHZ 1.5 V1.5 V 3.5 V 0 V 1.5 V VOL + 0.3 V 1.5 V VOH − 0.3 V ≈ 0 V 3 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING Output Output tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7 V Open TEST S1 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω , tr ≤ 2.5 ns, tf/char????????≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. 1.5 V SN54ABT16244, SN74ABT16244A 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS073H SEPTEMBER 1991 REVISED AUGUST 2005 Figure Load Circuit and Voltage Waveforms
www.ti.com 7-Oct-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) 5962-9317401MXA Active Production CFP (WD) | 48 15 | TUBE No SNPB N/A for Pkg Type -55 to 125 5962-9317401MX A SNJ54ABT16244W D 74ABT16244ADGGR1G4 Active Production TSSOP (DGG) | 48 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ABT16244A 74ABT16244ADGGR1G4.B Active Production TSSOP (DGG) | 48 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ABT16244A SN74ABT16244ADGGR Active Production TSSOP (DGG) | 48 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ABT16244A SN74ABT16244ADGGR.B Active Production TSSOP (DGG) | 48 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ABT16244A SN74ABT16244ADGVR Active Production TVSOP (DGV) | 48 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 AH244A SN74ABT16244ADGVR.B Active Production TVSOP (DGV) | 48 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 AH244A SN74ABT16244ADL Active Production SSOP (DL) | 48 25 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ABT16244A SN74ABT16244ADL.B Active Production SSOP (DL) | 48 25 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ABT16244A SN74ABT16244ADLG4 Active Production SSOP (DL) | 48 25 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ABT16244A SN74ABT16244ADLR Active Production SSOP (DL) | 48 1000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ABT16244A SN74ABT16244ADLR.B Active Production SSOP (DL) | 48 1000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ABT16244A SN74ABT16244ADLRG4 Active Production SSOP (DL) | 48 1000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 ABT16244A SNJ54ABT16244WD Active Production CFP (WD) | 48 15 | TUBE No SNPB N/A for Pkg Type -55 to 125 5962-9317401MX A SNJ54ABT16244W D (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 1
www.ti.com 7-Oct-2025 (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 25-Jul-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 25-Jul-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) 74ABT16244ADGGR1G4 TSSOP DGG 48 2000 356.0 356.0 45.0 SN74ABT16244ADGGR TSSOP DGG 48 2000 356.0 356.0 45.0 SN74ABT16244ADGVR TVSOP DGV 48 2000 353.0 353.0 32.0 SN74ABT16244ADLR SSOP DL 48 1000 356.0 356.0 53.0 Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 25-Jul-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) SN74ABT16244ADL DL SSOP 48 25 473.7 14.24 5110 7.87 SN74ABT16244ADL.B DL SSOP 48 25 473.7 14.24 5110 7.87 SN74ABT16244ADLG4 DL SSOP 48 25 473.7 14.24 5110 7.87 Pack Materials-Page 3
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
3,70 3,50 4,90 5,10 20DIM PINS ** 4073251/E 08/00 1,20 MAX Seating Plane 0,05 0,15 0,25 0,50 0,75 0,23 0,13 11 2 24 13 4,30 4,50 0,16 NOM Gage Plane A 7,90 7,70 382416 4,90 5,103,70 3,50 A MAX A MIN 6,60 6,20 11,20 11,40 9,60 9,80 0,08 M0,070,40 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. D. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194
www.ti.com PACKAGE OUTLINE C 8.3
7.9 TYP
1.2 1.0 46X 0.5 48X 0.27 0.17 11.5 (0.15) TYP 0 - 8 0.15 0.05 0.25 GAGE PLANE 0.75 0.50 A 12.6 12.4 NOTE 3 B 6.2 6.0 4214859/B 11/2020 TSSOP - 1.2 mm max heightDGG0048A SMALL OUTLINE PACKAGE NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. Reference JEDEC registration MO-153. 1 48
0.08 C A B
0.1 C SEE DETAIL A DETAIL A TYPICAL SCALE 1.350
www.ti.com EXAMPLE BOARD LAYOUT (7.5)
0.05 MAX
0.05 MIN
48X (1.5) 48X (0.3) 46X (0.5) (R0.05) TYP 4214859/B 11/2020 TSSOP - 1.2 mm max heightDGG0048A SMALL OUTLINE PACKAGE SYMM SYMM LAND PATTERN EXAMPLE SCALE:6X 24 25 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED
www.ti.com EXAMPLE STENCIL DESIGN (7.5) 46X (0.5) 48X (0.3) 48X (1.5) (R0.05) TYP 4214859/B 11/2020 TSSOP - 1.2 mm max heightDGG0048A SMALL OUTLINE PACKAGE NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. SYMM SYMM 24 25 SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:6X
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 4040078/F 12/97
48 PINS SHOWN
0,25 0,15 NOM Gage Plane 6,00 6,20 8,30 7,90 0,75 0,50 Seating Plane 0,27 0,17 A 1,20 MAX M0,08 0,10 0,50 0°–8° 14,10 13,90 48DIM A MAX A MIN PINS ** 12,40 12,60 17,10 16,90 0,15 0,05 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold protrusion not to exceed 0,15. D. Falls within JEDEC MO-153
MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 WD (R-GDFP-F**) CERAMIC DUAL FLATPACK 4040176/D 10/97
48 LEADS SHOWN
0.610 (18,80) 0.710 (18,03) 0.7400.640 0.390 (9,91) 0.370 (9,40) 0.870 (22,10) 1.130 (28,70) A 0.120 (3,05) 0.075 (1,91) LEADS** NO. OF A MIN A MAX (16,26) (15,49) 0.025 (0,635) 0.009 (0,23) 0.004 (0,10) 0.370 (9,40) 0.250 (6,35) 0.370 (9,40) 0.250 (6,35) 0.014 (0,36) 0.008 (0,20) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification only E. Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO-146AA GDFP1-F56 and JEDEC MO-146AB
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