SN54ABT162245 TI | Alldatasheet
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/C0083/C0078/C0053/C0052/C0065/C0066/C0084/C0049/C0054/C0050/C0050/C0052/C0053/C0044 /C0083/C0078/C0055/C0052/C0065/C0066/C0084/C0049/C0054/C0050/C0050/C0052/C0053 /C0049/C0054/C0262/C0066/C0073/C0084 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCBS239F − MARCH 1993 − REVISED JUNE 2004 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Members of the Texas Instruments Widebus Family /C0068A-Port Outputs Have Equivalent 25-Ω Series Resistors, So No External Resistors Are Required /C0068Typical VOLP (Output Ground Bounce) <1 V at VCC = 5 V, TA = 25°C /C0068Distributed VCC and GND Pins Minimize High-Speed Switching Noise /C0068Ioff Supports Partial-Power-Down Mode Operation /C0068Flow-Through Architecture Optimizes PCB Layout /C0068Latch-Up Performance Exceeds 500 mA Per JESD 17 /C0068ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) description/ordering information The ’ABT162245 devices are 16-bit noninverting 3-state transceivers designed for synchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE ) input can be used to disable the device so that the buses effectively are isolated. The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 25-Ω series resistors to reduce overshoot and undershoot. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.
ORDERING INFORMATION
TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING SSOP − DL Tube SN74ABT162245DL ABT162245 −40°C to 85°C SSOP − DL Tape and reel SN74ABT162245DLR ABT162245 −40 C to 85C TSSOP − DGG Tape and reel SN74ABT162245DGGR ABT162245 −55°C to 125°C CFP − WD Tube SNJ54ABT162245WD SNJ54ABT162245WD † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2004, Texas Instruments Incorporated/C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. SN54ABT162245 . . . WD PACKAGE SN74ABT162245 . . . DGG OR DL PACKAGE (TOP VIEW) 1DIR 1B1 1B2 GND 1B3 1B4 V CC 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 V CC 2B5 2B6 GND 2B7 2B8 2DIR 1OE 1A1 1A2 GND 1A3 1A4 V CC 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 V CC 2A5 2A6 GND 2A7 2A8 2OE /C0079/C0110 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0109/C0112/C0108/C0105/C0097/C0110/C0116 /C0116/C0111 /C0077/C0073/C0076/C0262/C0080/C0082/C0070/C0262/C0051/C0056/C0053/C0051/C0053/C0044 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115 /C0097/C0114/C0101 /C0116/C0101/C0115/C0116/C0101/C0100 /C0117/C0110/C0108/C0101/C0115/C0115 /C0111/C0116/C0104/C0101/C0114/C0119/C0105/C0115/C0101 /C0110/C0111/C0116/C0101/C0100/C0046 /C0079/C0110 /C0097/C0108/C0108 /C0111/C0116/C0104/C0101/C0114 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0115/C0044 /C0112/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046
/C0083/C0078/C0053/C0052/C0065/C0066/C0084/C0049/C0054/C0050/C0050/C0052/C0053/C0044 /C0083/C0078/C0055/C0052/C0065/C0066/C0084/C0049/C0054/C0050/C0050/C0052/C0053 /C0049/C0054/C0262/C0066/C0073/C0084 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCBS239F − MARCH 1993 − REVISED JUNE 2004
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description/ordering information (continued) To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE (each 8-bit section) INPUTS OPERATIONOE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation logic diagram (positive logic) To Seven Other Channels 1DIR 1A1 1B1 1OE To Seven Other Channels 2DIR 2A1 2B1 2OE absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51−7.
/C0083/C0078/C0053/C0052/C0065/C0066/C0084/C0049/C0054/C0050/C0050/C0052/C0053/C0044 /C0083/C0078/C0055/C0052/C0065/C0066/C0084/C0049/C0054/C0050/C0050/C0052/C0053 /C0049/C0054/C0262/C0066/C0073/C0084 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCBS239F − MARCH 1993 − REVISED JUNE 2004 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (see Note 3) SN54ABT162245 SN74ABT162245 UNITMIN MAX MIN MAX UNIT VCC Supply voltage 4.5 5.5 4.5 5.5 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V VI Input voltage 0 VCC 0 VCC V IOH High-level output current B port −24 −32 mAIOH High-level output current A port −3 −12 mA IOL Low-level output current B port 48 64 mAIOL Low-level output current A port 12 12 mA ∆t/∆v Input transition rise or fall rate Outputs enabled 10 10 ns/V TA Operating free-air temperature −55 125 −40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
/C0083/C0078/C0053/C0052/C0065/C0066/C0084/C0049/C0054/C0050/C0050/C0052/C0053/C0044 /C0083/C0078/C0055/C0052/C0065/C0066/C0084/C0049/C0054/C0050/C0050/C0052/C0053 /C0049/C0054/C0262/C0066/C0073/C0084 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCBS239F − MARCH 1993 − REVISED JUNE 2004
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = 25°C SN54ABT162245 SN74ABT162245 UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN MAX MIN MAX UNIT VIK VCC = 4.5 V, II = −18 mA −1.2 −1.2 −1.2 V VCC = 5 V, IOH = −1 mA 3.8 2.5 2.5 A port IOH = −1 mA 3.3 3 3 A port VCC = 4.5 V IOH = −3 mA 3.1 3 3.1 VOH VCC = 4.5 V IOH = −12 mA 2.6* 2.6 VVOH VCC = 5 V, IOH = −3 mA 3 3 3 V B port IOH = −3 mA 2.5 2.5 2.5 B port VCC = 4.5 V IOH = −24 mA 2VCC = 4.5 V IOH = −32 mA 2* 2 A port IOL = 12 mA 0.8 0.8 0.8 VOL B port VCC = 4.5 V IOL = 48 mA 0.45 0.45 0.45 VVOL B port VCC = 4.5 V IOL = 64 mA 0.55* 0.55 V Vhys 100 mV II Control inputs VCC = 5.5 V, VI = VCC or GND ±1 ±1 ±1 µAII A or B ports VCC = 5.5 V, VI = VCC or GND ±20 ±20 ±20 µA IOZH § VCC = 5.5 V, VO = 2.7 V 10 10 10 µA IOZL § VCC = 5.5 V, VO = 0.5 V −10 −10 −10 µA Ioff VCC = 0, VI or VO ≤ 4.5 V ±100 ±100 µA ICEX VCC = 5.5 V, VO = 5.5 V Outputs high 50 50 50 µA IO ¶ A port VCC = 5.5 V, VO = 2.5 V mAIO ¶ B port VCC = 5.5 V, VO = 2.5 V −50 −100 −180 −50 −180 −50 −180 mA VCC = 5.5 V, Outputs high 2 2 2 ICC A or B ports VCC = 5.5 V, IO = 0, V = V or GND Outputs low 32 32 32 mAICC A or B portsIO = 0, VI = VCC or GND Outputs disabled 2 2 2 mA Data inputs VCC = 5.5 V, One input at 3.4 V, Outputs enabled 1 2 2 ∆ICC # Data inputs One input at 3.4 V, Other inputs at VCC or GND Outputs disabled 0.05 1 0.05 mACC Control inputs VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND 1.5 1.5 1.5 C i VI = 2.5 V or 0.5 V 3 pF C io VO = 2.5 V or 0.5 V 6 pF * On products compliant to MIL-PRF-38535, this parameter does not apply. † All typical values are at VCC = 5 V. ‡ This limit applies only to the SN74ABT162245. § The parameters IOZH and IOZL include the input leakage current. ¶ Not more than one output should be tested at a time, and the duration of the test should not exceed one second. # This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
/C0083/C0078/C0053/C0052/C0065/C0066/C0084/C0049/C0054/C0050/C0050/C0052/C0053/C0044 /C0083/C0078/C0055/C0052/C0065/C0066/C0084/C0049/C0054/C0050/C0050/C0052/C0053 /C0049/C0054/C0262/C0066/C0073/C0084 /C0066/C0085/C0083 /C0084/C0082/C0065/C0078/C0083/C0067/C0069/C0073/C0086/C0069/C0082/C0083 /C0087/C0073/C0084/C0072 /C0051/C0262/C0083/C0084/C0065/C0084/C0069 /C0079/C0085/C0084/C0080/C0085/C0084/C0083 SCBS239F − MARCH 1993 − REVISED JUNE 2004 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, TA = 25°C SN54ABT162245 SN74ABT162245 UNITPARAMETER (INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX UNIT tPLH A B 1 2.2 3.4 1 4.1 1 3.9 nstPHL A B 1 2.3 3.7 1 4.4 1 4.2 ns tPLH B A 1 2.7 4.1 1 4.9 1 4.6 nstPHL tPZH OE B 1 3.6 5.2 1 6.4 1 6.3 nstPZL OE B 1 3.7 5.4 1 6.5 1 6.4 ns tPHZ OE B 2 4.4 5.8 2 6.4 2 6.3 ns tPLZ OE B ns tPZH OE A nstPZL tPHZ OE A 2 4.5 6.1 2 6.8 2 6.6 ns tPLZ OE A ns
6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
N OTES: A. C L includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms
Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 5962-9677401QXA ACTIVE CFP WD 48 1 TBD Call TI Level-NC-NC-NC 74ABT162245DGGRE4 ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74ABT162245DLRG4 ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT162245DGGR ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT162245DL ACTIVE SSOP DL 48 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT162245DLR ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54ABT162245WD ACTIVE CFP WD 48 1 TBD Call TI Level-NC-NC-NC (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 26-Sep-2005 Addendum-Page 1
MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 WD (R-GDFP-F**) CERAMIC DUAL FLATPACK 4040176/D 10/97
48 LEADS SHOWN
0.610 (18,80) 0.710 (18,03) 0.7400.640 0.390 (9,91) 0.370 (9,40) 0.870 (22,10) 1.130 (28,70) A 0.120 (3,05) 0.075 (1,91) LEADS** NO. OF A MIN A MAX (16,26) (15,49) 0.025 (0,635) 0.009 (0,23) 0.004 (0,10) 0.370 (9,40) 0.250 (6,35) 0.370 (9,40) 0.250 (6,35) 0.014 (0,36) 0.008 (0,20) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification only E. Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO-146AA GDFP1-F56 and JEDEC MO-146AB
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DL (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 4040048/E 12/01
48 PINS SHOWN
0.730 (18,54) 0.720 (18,29) 4828 0.370 (9,40) (9,65) 0.380 Gage Plane DIM 0.420 (10,67) 0.395 (10,03) A MIN A MAX 0.010 (0,25) PINS ** 0.630 (16,00) (15,75) 0.620 0.010 (0,25) Seating Plane 0.020 (0,51) 0.040 (1,02) 0.008 (0,203) 0.0135 (0,343) 0.008 (0,20) MIN A 0.110 (2,79) MAX 0.299 (7,59) 0.291 (7,39) 0.004 (0,10) M0.005 (0,13) 0.025 (0,635) 0°–/C02578° 0.005 (0,13) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). D. Falls within JEDEC MO-118
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 4040078/F 12/97 0,25 0,15 NOM Gage Plane 6,00 6,20 8,30 7,90 0,75 0,50 Seating Plane 0,27 0,17 A 1,20 MAX M0,08 0,10 0,50 0°–8° 14,10 13,90 48DIM A MAX A MIN PINS ** 12,40 12,60 17,10 16,90 0,15 0,05 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold protrusion not to exceed 0,15. D. Falls within JEDEC MO-153
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