74ABT126 FAIRCHILD | Alldatasheet

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I Output sink capability of 64 mA, source capability of 32 m I Guaranteed latchup protection I High impedance glitch free bus loading during entire power up and power down cycle I Nondestructive hot insertion capability I Disable time less than enable time to avoid bus contention Ordering Code: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Connection Diagram Pin Descriptions Function Table H /c32 HIGH Voltage Level L /c32 LOW Voltage Level Z /c32 HIGH Impedance X /c32 Immaterial Order Number Package Package DescriptionNumber 74ABT126CSC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74ABT126CSJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ABT126CMTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ABT126CMTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Descriptions An, Bn Inputs O n Outputs Inputs Output A n B n O n HLL HHH LXZ

www.fairchildsemi.com 2 74ABT126 Absolute Maximum Ratings(Note 2) Recommended Operating Conditions Note 2: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 3: Either voltage limit or current limit is sufficient to protect inputs. Note 4: Guaranteed, but not tested. Note 5: For 8 bits toggling, ICCD /c31 0.8 mA/MHz. Storage Temperature /c16 65/c113 C to /c14 150/c113 C Ambient Temperature under Bias /c16 55/c113 C to /c14 125/c113 C Junction Temperature under Bias /c16 55/c113 C to /c14 150/c113 C VCC Pin Potential to Ground Pin /c16 0.5V to /c14 7.0V Input Voltage (Note 3) /c16 0.5V to /c14 7.0V Input Current (Note 3) /c16 30 mA to /c14 5.0 mA Voltage Applied to Any Output in the Disabled or Power-Off State /c16 0.5V to 5.5V in the HIGH State /c16 0.5V to VCC Current Applied to Output in LOW State (Max) twice the rated I OL (mA) DC Latchup Source Current (Across Comm Operating Range) /c16 300 mA Over Voltage Latchup (I/O) 10V Free Air Ambient Temperature /c16 40/c113 C to /c14 85/c113 C Supply Voltage /c14 4.5V to /c14 5.5V Minimum Input Edge Rate (/c39 V//c39 t) Data Input 50 mV/ns Enable Input 100 mV/ns Symbol Parameter Min Typ Max Units VCC Conditions VIH Input HIGH Voltage 2.0 V Recognized HIGH Signal VIL Input LOW Voltage 0.8 V Recognized LOW Signal VCD Input Clamp Diode Voltage /c16 1.2 V Min I IN /c32 /c16 18 mA VOH Output HIGH Voltage 2.5 V Min I OH /c32 /c16 3 mA

2.0 V Min I OH /c32 /c16 32 mA

VOL Output LOW Voltage 0.55 V Min I OL /c32 64 mA IIH Input HIGH Current 1 /c80 AM a x VIN /c32 2.7V (Note 4) 1V IN /c32 VCC IBVI Input HIGH Current Breakdown Test 7 /c80 AM a x V IN /c32 7.0V IIL Input LOW Current /c16 1 /c80 AM a x VIN /c32 0.5V (Note 4) /c16 1V IN /c32 0.0V VID Input Leakage Test 4.75 V 0.0 I ID /c32 1.9 /c80 A, All Other Pin Grounded IOZH Output Leakage Current 10 /c80 A0 /c16 5.5V VOUT /c32 2.7V; OEn /c32 2.0V IOZL Output Leakage Current /c16 10 /c80 A0 /c16 5.5V VOUT /c32 0.5V; OEn /c32 2.0V IOS Output Short-Circuit Current -100 /c16 275 mA Max V OUT /c32 0.0V ICEX Output HIGH Leakage Current 50 /c80 AM a x V OUT /c32 VCC IZZ Bus Drainage Test 100 /c80 A0 . 0 V OUT /c32 5.5V; All Others GND ICCH Power Supply Current 50 /c80 A Max All Outputs HIGH ICCL Power Supply Current 15 mA Max All Outputs LOW ICCZ Power Supply Current 50 /c80 AM a x O E n /c32 VCC ; All Others at VCC or Ground ICCT Additional ICC /Input Outputs Enabled 1.5 mA Max VI /c32 VCC /c16 2.1V Outputs 3-STATE 1.5 mA Enable Input V I /c32 VCC /c16 2.1V Outputs 3-STATE 50 /c80 A Data Input V I /c32 VCC /c16 2.1V All Others at VCC or Ground ICCD Dynamic ICC No Load mA/ Max Outputs Open (Note 4) 0.1 MHz OE n /c32 GND, (Note 5) One Bit Toggling, 50% Duty Cycle

3 www.fairchildsemi.com 74ABT126 Capacitance Note 6: C OUT is measured at frequency f /c32 1 MHz, per MIL-STD-883, Method 3012. TA /c32 /c14 25/c113 CT A /c32 /c16 40/c113 C to /c14 85/c113 C Symbol Parameter VCC /c32 /c14 5V V CC /c32 4.5V–5.5V Units C L /c32 50 pF C L /c32 50 pF Min Typ Max Min Max tPLH Propagation Delay 1.0 4.4 1.0 4.4 ns tPHL Data to Outputs 1.0 4.6 1.0 4.6 tPZH Output Enable 1.0 6.5 1.0 6.5 ns tPZL Time 1.0 6.5 1.0 6.5 tPHZ Output Disable 1.0 5.8 1.0 5.8 ns tPLZ Time 1.0 5.5 1.0 5.5 Symbol Parameter Typ Units Conditions TA /c32 25/c113 C C IN Input Capacitance 5.0 pF V CC /c32 0V C OUT (Note 6) Output Capacitance 9.0 pF V CC /c32 5.0V

www.fairchildsemi.com 4 74ABT126 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A

5 www.fairchildsemi.com 74ABT126 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D

www.fairchildsemi.com 6 74ABT126 Quad Buffer with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com