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DM74LS670 FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

■ For use as: Scratch pad memory Buffer storage between processors Bit storage in fast multiplication designs ■ Separate read/write addressing permits simultaneous reading and writing ■ Organized as 4 words of 4 bits ■ Expandable to 512 words of n-bits ■ 3-STATE versions of DM74LS170 ■ Fast access times 20 ns typ Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Order Number Package Number Package Description DM74LS670M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS670N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

www.fairchildsemi.com 2 DM74LS670 Connection Diagram Function Tables Write Table (Note 1)(Note 2) Read Table (Note 3) H = HIGH Level L = LOW Level X = Don't Care Z = High Impedance (OFF) Note 1: (Q = D) = The four selected internal flip-flop outputs will assume the states applied to the four external data inputs. Note 2: Q 0 = The level of Q before the indicated input conditions were established. Note 3: WOB1 = The first bit of word 0, etc. Logic Diagram Write Inputs Word W B W A G W 0123 LLL Q = DQ 0 Q 0 Q 0 LHL Q 0 Q = DQ 0 Q 0 HLL Q 0 Q 0 Q = DQ 0 HHL Q 0 Q 0 Q 0 Q = D XXH Q 0 Q 0 Q 0 Q 0 Read Inputs Outputs R B R A G R Q1 Q2 Q3 Q4 L L L WOB1 WOB2 WOB3 WOB4 L H L W1B1 W1B2 W1B3 W1B4 H L L W2B1 W2B2 W2B3 W2B4 H H L W3B1 W3B2 W3B3 W3B4 X X H ZZZZ

3 www.fairchildsemi.com DM74LS670 Absolute Maximum Ratings(Note 4) Note 4: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Recommended Operating Conditions Note 5: TA = 25°C and VCC = 5V. Note 6: Times are with respect to the Write-Enable input. Write-Select time will protect the data written into the previous address. If protection of data in the previous address, tSETUP (WA, WB) can be ignored. As any address selection sustained for the final 30 ns of the Write-Enable pulse and during tH (WA, WB) will result in data being written into that location. Depending on the duration of the input conditions, one or a number of previous addresses may have been written into. Note 7: Latch time is the time allowed for the internal output of the latch to assume the state of new data. This is important only when attempting to read from a location immediately after that location has received new data. Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C Symbol Parameter Min Nom Max Units V CC Supply Voltage 4.75 5 5.25 V VIH HIGH Level Input Voltage 2 V VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −2.6 mA IOL LOW Level Output Current 24 mA tW Write Enable Pulse Width (Note 5) 25 ns tSU Setup Time Data 10 ns(Note 5)(Note 6) W A, WB 15 tH Hold Time Data 15 ns(Note 5)(Note 6) W A, WB 5 tLATCH Latch Time for New Data (Note 5)(Note 7) 25 ns TA Free Air Operating Temperature 0 70 °C

www.fairchildsemi.com 4 DM74LS670

Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted) Note 8: All typicals are at VCC = 5V, TA = 25°C. Note 9: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 10: ICC is measured with 4.5V applied to all DATA inputs and both ENABLE inputs, all ADDRESS inputs are grounded and all outputs are OPEN. Switching Characteristics at VCC = 5V and TA = 25°C Note 11: C L = 5 pF. Symbol Parameter Conditions Min Typ Max Units (Note 8) VI Input Clamp Voltage V CC = Min, II = −18 mA −1.5 V VOH HIGH Level V CC = Min, IOH = Max 2.4 3.4 V Output Voltage V IL = Max, VIH = Min VOL LOW Level V CC = Min, IOL = Max 0.34 0.5 V Output Voltage I OL = Max, VIH = Min II Input Current @ Max V CC = Max D, R or W 0.1 Input Voltage V I = 7V G W 0.2 mA G R 0.3 IIH HIGH Level V CC = Max D, R or W 20 Input Current V I = 2.7V G W 40 µA G R 60 IIL LOW Level V CC = Max D, R or W −0.4 Input Current V I = 0.4V G W −0.8 mA G R −1.2 IOZH Off-State Output Current with VCC = Max, VO = 2.7V 20 µA HIGH Level Output Voltage Applied VIH = Min, VIL = Max IOZL Off-State Output Current with VCC = Max, VO = 0.4V −20 µA LOW Level Output Voltage Applied VIH = Min, VIL = Max IOS Short Circuit Output Current V CC = Max (Note 9) −20 −100 mA ICC Supply Current V CC = Max (Note 10) 30 50 mA R L = 667Ω Symbol Parameter From (Input) C L = 45 pF C L = 150 pF Units To (Output) Min Max Min Max tPLH Propagation Delay Time Read Select to Q 40 50 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time Read Select to Q 45 55 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time Write Enable to Q 45 55 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time Write Enable to Q 50 60 ns HIGH-to-LOW Level Output tPLH Propagation Delay Time Data to Q 45 55 ns LOW-to-HIGH Level Output tPHL Propagation Delay Time Data to Q 40 50 ns HIGH-to-LOW Level Output tPZH Output Enable Time Read Enable to Any Q 35 45 ns to HIGH Level Output tPZL Output Enable Time Read Enable to Any Q 40 50 ns to LOW Level Output tPHZ Output Disable Time from Read Enable to Any Q 50 ns HIGH Level Output (Note 11) tPLZ Output Disable Time from Read Enable to Any Q 35 ns LOW Level Output (Note 11)

5 www.fairchildsemi.com DM74LS670 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A

www.fairchildsemi.com 6 DM74LS670 3-STATE 4-by-4 Register File Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com