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MM54HCT640 NSC | Alldatasheet

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Y Octal TRI-STATE outputs for mP bus applications: 6 mA, typical Y High speed: 16 ns typical propagation delay Y Low power: 80 mA maximum (74HCT) Connection Diagram Dual-In-Line Packages TL/F/5370–1 Top View Order Number MM54HCT640 or MM74HCT640 TL/F/5370–2 Top View Order Number MM54HCT643 or MM74HCT643 Truth Table Control OperationInputs G DIR 640 643 LL B data to A bus B data to A bus LH A data to B bus A data to B bus H X Isolation Isolation Hehigh level, L elow level, X eirrelevant TRI-STATEÉ is a registered trademark of National Semiconductor Corp. C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Absolute Maximum Ratings (Notes1&2 ) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (V CC) b0.5 to a7.0V DC Input Voltage (V IN) b1.5 to V CCa1.5V DC Output Voltage (V OUT) b0.5 to V CCa0.5V Clamp Diode Current (I IK,I OK) g20 mA DC Output Current, per pin (I OUT) g35 mA DC V CC or GND Current, per pin (I CC) g70 mA Storage Temperature Range (T STG) b65§Ct o a150§C Power Dissipation (P D) (Note 3) 600 mW S.O. Package only 500 mW Lead Temperature (T (Soldering 10 seconds) 260 §C Operating Conditions Min Max Units Supply Voltage (V CC) 4.5 5.5 V DC Input or Output Voltage 0 V CC V (VIN,V OUT) Operating Temp. Range (T A) MM74HCT b40 a85 §C MM54HCT b55 a125 §C Input Rise or Fall Times (tr,t f) 500 ns TAe25§C 74HCT 54HCT Symbol Parameter Conditions TAeb40 to 85 §CT Aeb55 to 125 §C Units Typ Guaranteed Limits VIH Minimum High Level 2.0 2.0 2.0 V Input Voltage VIL Maximum Low Level 0.8 0.8 0.8 V Input Voltage VOH Minimum High Level V INeVIH or V IL Output Voltage lIOUTle20 mAV CC VCC-0.1 V CC-0.1 V CC-0.1 V VOL Maximum Low Level V INeVIH or V IL Voltage lIOUTle20 mA 0 0.1 0.1 0.1 V IIN Maximum Input V INeVCC or GND, g0.1 g1.0 g1.0 mA Current V IH or V IL IOZ Maximum TRI-STATE V OUTeVCC or GND g0.5 g5.0 g10 mA Output Leakage Enable G eVIH Current ICC Maximum Quiescent V INeVCC or GND 8 80 160 mA Supply Current I OUTe0mA (Note 4) Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating Ð plastic ‘‘N’’ package: b12 mW/ §C from 65 §Ct o8 5 §C; ceramic ‘‘J’’ package: b12 mW/ §C from 100 §Ct o1 2 5 §C. Note 4: Measured per input. All other inputs held at V CC or ground. VCCe5.0V, t retfe6 ns, T Ae25§C (unless otherwise specified) Symbol Parameter Conditions Typ Guaranteed UnitsLimits tPHL,t PLH Maximum Output C Le45 pF 16 20 ns Propagation Delay tPZL,t PZH Maximum Output C Le45 pF 29 40 ns Enable Time R Le1k X tPLZ,t PHZ Maximum Output C Le5p F 2 0 2 5 n s Disable Time R Le1k X

VCCe5.0V g 10%, t retfe6 ns (unless otherwise specified) TAe25§C 74HCT 54HCT Symbol Parameter Conditions TAeb40 to 85 §CT Aeb55 to 125 §C Units Typ Guaranteed Limits tPHL,t PLH Maximum Output C Le50 pF 17 23 29 34 ns Propagation Delay CLe150 pF 24 30 38 45 ns tPZH,t PZL Maximum Output R Le1kX CLe50 pF 23 30 38 45 ns Enable Time tPHZ,t PLZ Maximum Output R Le1kX 21 30 38 45 ns Disable Time C Le50 pF tTHL,t TLH Maximum Output C Le50 pF 8 12 15 18 ns Rise and Fall Time CIN Maximum Input 10 15 15 15 pF Capacitance COUT Maximum Output/ 20 25 25 25 pF Input Capacitance CPD Power Dissipation (per output) G eVCC 7p F Capacitance (Note 5) G eGND 100 pF VCCe5.0V, t retfe6 ns, T Ae25§C (unless otherwise specified) Symbol Parameter Conditions Typ Guaranteed UnitsLimits tPHL,t PLH Maximum Output C Le45 pF 16 20 ns Propagation Delay tPZL,t PZH Maximum Output C Le45 pF 29 40 ns Enable Time R Le1k X tPLZ,t PHZ Maximum Output C Le5p F 2 0 2 5 n s Disable Time R Le1k X VCCe5.0V g 10%, t retfe6 ns (unless otherwise specified) TAe25§C 74HCT 54HCT Symbol Parameter Conditions TAeb40 to 85 §CT Aeb55 to 125 §C Units Typ Guaranteed Limits tPHL,t PLH Maximum Output C Le50 pF 17 23 29 34 ns Propagation Delay CLe150 pF 24 30 38 45 ns tPZH,t PZL Maximum Output R Le1k X CLe50 pF 23 30 38 45 ns Enable Time tPHZ,t PLZ Maximum Output R Le1k X 21 30 38 45 ns Disable Time C Le50 pF ns tTHL,t TLH Maximum Output C Le50 pF 8 12 15 18 ns Rise and Fall Time CIN Maximum Input 10 15 15 15 pF Capacitance COUT Maximum Output/ 20 25 25 25 pF Input Capacitance CPD Power Dissipation (per output) G eVCC 7p F Capacitance (Note 5) G eGND 100 pF Note 5: CPD determines the no load power consumption. P DeCPDVCC2f aICCVCC. The no load dynamic current consumption, I SeCPDVCC aICC.

MM54HCT640/MM74HCT640 Inverting Octal TRI-STATE Transceiver MM54HCT643/MM74HCT643 True-Inverting Octal TRI-STATE Transceiver Physical Dimensions inches (millimeters) Cavity Dual-In line Package (J) Order Number MM54HCT640J, MM54HCT643J, MM74HCT640J, or MM74HCT643J See NS Package J20A Moulded Dual-In line Package (N) Order Number MM74HCT640N or MM74HCT643N See NS Package N20ALIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

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