74121

DM74121 FAIRCHILD | Alldatasheet

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Technical content

Features

I Triggered from active-HIGH transition or active-LOW transition inputs I Variable pulse width from 30 ns to 28 seconds I Jitter free Schmitt-trigger input I Excellent noise immunity typically 1.2V I Stable pulse width up to 90% duty cycle I TTL, DTL compatible I Compensated for VCC and temperature variations I Input clamp diodes Ordering Code: Connection Diagram Function Table H = HIGH Logic Level ↑ = Positive Going Transition L = LOW Logic Level ↓ = Negative Going Transition X = Can Be Either LOW or HIGH /c12 = A Positive Pulse /c13 = A Negative Pulse Functional Description The basic output pulse width is determined by selection of an internal resistor RINT or an external resistor (RX) and capacitor (CX). Once triggered the output pulse width is independent of further transitions of the inputs and is func- tion of the timing components. Pulse width can vary from a few nano-seconds to 28 seconds by choosing appropriate R X and CX combinations. There are three trigger inputs from the device, two negative edge-triggering (A) inputs, one positive edge Schmitt-triggering (B) input. Order Number Package Number Package Description DM74121N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Inputs Outputs A1 A2 B Q Q LXHLH XLHLH XXLLH HHXLH H ↓ H /c12/c13 ↓ HH /c12/c13 ↓↓ H /c12/c13 LX ↑ /c12/c13 XL ↑ /c12/c13

3 www.fairchildsemi.com DM74121 Absolute Maximum Ratings(Note 1) Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions table will define the conditions for actual device operation. Recommended Operating Conditions Note 2: TA = 25°C and VCC = 5V

Electrical Characteristics

over recommended operating free air temperature range (unless otherwise noted) Note 3: All typicals are at VCC = 5V, TA = 25°C. Note 4: Not more than one output should be shorted at a time. Supply Voltage 7V Input Voltage 5.5V Operating Free Air Temperature Range 0°C to +70°C Storage Temperature Range −65°C to +150°C Symbol Parameter Min Nom Max Units V CC Supply Voltage 4.75 5 5.25 V VT+ Positive-Going Input Threshold Voltage 1.4 2 Vat the A Input (VCC = Min) VT− Negative-Going Input Threshold Voltage 0.8 1.4 Vat the A Input (VCC = Min) VT+ Positive-Going Input Threshold Voltage 1.5 2 Vat the B Input (VCC = Min) VT− Negative-Going Input Threshold Voltage 0.8 1.3 Vat the B Input (VCC = Min) IOH HIGH Level Output Current −0.4 mA IOL LOW Level Output Current 16 mA tW Input Pulse Width (Note 2) 40 ns dV/dt Rate of Rise or Fall of 1V / sSchmidt Input (B) (Note 2) dV/dt Rate of Rise or Fall of 1V / µsSchmidt Input (A) (Note 2) R EXT External Timing Resistor (Note 2) 1.4 40 k Ω C EXT External Timing Capacitance (Note 2) 0 1000 µF DC Duty Cycle (Note 2) R T = 2 kΩ 67 %R T = REXT (Max) 90 TA Free Air Operating Temperature 0 70 °C Symbol Parameter Conditions Min Typ (Note 3) Max Units VI Input Clamp Voltage V CC = Min, II = −12 mA −1.5 V VOH HIGH Level Output V CC = Min, IOH = Max, 2.4 3.4 V Voltage V IL = Max, VIH = Min VOL LOW Level Output V CC = Min, IOL = Max, 0.2 0.4 V Voltage V IH = Max, VIL = Min II Input Current @ VCC = Max, VI = 5.5V 1 mA Max Input Voltage IIH HIGH Level V CC = Max, A1, A2 40 µA Input Current V I = 2.4V B 80 IIL LOW Level V CC = Max, A1, A2 −1.6 mA Input Current V I = 0.4V B −3.2 IOS Short Circuit Output Current VCC = Max (Note 4) −18 −55 mA ICC Supply Current V CC = Max Quiescent 13 25 mA Triggered 23 40

www.fairchildsemi.com 4 DM74121 Switching Characteristics At VCC = 5V and TA = 25°C (See Test Waveforms and Output Load Section) Symbol Parameter From (Input) Conditions Min Max Units To (Output) tPLH Propagation Delay Time A1, A2 C EXT = 80 pF 70 ns LOW-to-HIGH Level Output to Q R INT to VCC tPLH Propagation Delay Time B to C L = 15 pF 55 ns LOW-to-HIGH Level Output Q R L = 400Ω tPHL Propagation Delay Time A1, A2 80 nsHIGH-to-LOW Level Output to Q tPHL Propagation Delay Time B 65 nsHIGH-to-LOW Level Output to Q tW(OUT) Output Pulse A1, A2 or B C EXT = 80 pF 70 150 ns Width Using the to Q, Q R INT to VCC Internal Timing Resistor R L = 400Ω C L = 15 pF tW(OUT) Output Pulse A1, A2 C EXT = 0 pF 50 ns Width Using Zero to Q, Q R INT to VCC Timing Capacitance R L = 400Ω C L = 15 pF tW(OUT) Output Pulse A1, A2 C EXT = 100pF 600 800 ns Width Using External to Q, Q R INT = 10 kΩ Timing Resistor R L = 400Ω C L = 15pF A1, A2 C EXT = 1 µF 68 m sto Q, Q R INT = 10 kΩ R L = 400Ω C L = 15 pF

5 www.fairchildsemi.com DM74121 One-Shot with Clear and Complementary Outputs Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com