TDA7403 STMICROELECTRONICS | Alldatasheet
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DEVICE INCLUDES AUDIO PROCESSOR, STEREO DECODER AND NOISEBLANKER HIGH PERFORMANCE SIGNAL PROCES- SOR WITH BASIC FUNCTIONS AM, FM, MPX AND CASSETTE INPUTS NO EXTERNAL COMPONENTS REQUIRED FULLY PROGRAMMABLE VIA I 2C BUS LOW DISTORTION AND NOISE
DESCRIPTION
The TDA7403 is a high performance signal proc- essor specifically designed for car radio applica- tions focused on the low-end market. The device includes a complete audioprocessor and a stereo decoder with noiseblanker. Switched-capacitors design technique allows to obtain all these features without external compo- nents or adjustments. Using TDA7403 results is in a very performant low-cost signal processing application The device is fully programmable by I 2C bus in- terface allowing to customize key device parame- ters and especially filter characteristics. The BICMOS process combined with the opti- mized signal processing assure low noise and low distortion performances. This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. October 1998 SUPPLY DEMODULATOR + STEREO ADJUST + STEREO BLEND CREF OUT LR D98AU918 DIGITAL CONTROL PILOT CANCELLATION VS CASS L INPUT MULTIPLEXER AUTO ZERO MPX VOLUME BASS TREBLE OUT LR OUT LF OUT RR OUT RF OUT LF OUT RR OUT RF SCL SDA 80KHz LP FM R FM L PLL 25KHz LP S&H HIGH CUT CONTROL PULSE FORMER D LEVEL AM CASS R GND SM SOFT MUTE PIL DET I2C BUS NOISE BLANKER A 14 20 11 17 BLOCK DIAGRAM SO20 ORDERING NUMBER: TDA7403D TDA7403 BASIC SIGNAL PROCESSOR PRELIMINARY DATA
Symbol Parameter Value Unit VS Operating Supply Voltage 10.5 V Tamb Operating Ambient Temperature Range -40 to 80 °C Tstg Operating Storage Temperature Range -55 to 150 °C SUPPLY Symbol Parameter Test Condition Min. Typ. Max. Unit VS Supply Voltage 7.5 9 10 V IS Supply Current V S = 9 V 2 53 03 5 m A SVRR Ripple Rejection @ 1KHz Audioprocessor (all filters flat) 60 dB Stereodecoder + Audioprocessor 55 dB ESD All pins are protected against ESD according to the MIL883 standard. THERMAL DATA Symbol Parameter Value Unit R th-j pins Thermal Resistance Junction-pins Max 85 °C/W CASS R CASS L N.C. N.C. N.C. N.C. N.C. AM MPX SCL SDA GND OUT RR V S OUT LR OUT RF OUT LF CREF1 LEVEL SM D98AU919 PIN CONNECTION TDA7403
N. Name Function Type
1 CASSR Cassette Input Right I
2 CASSL Cassette Input Left I
3 n.c. not connected 4 n.c. not connected 5 n.c. not connected 6 n.c. not connected 7 n.c. not connected
8 AM AM Input I
9 MPX FM Input (MPX) I
10 LEVEL Level Input Stereodecoder I
11 SM Soft Mute Drive I
12 SCL I
13 SDA I 2C Data Line I/O
14 GND Supply Ground S
15 VS Supply Voltage S
16 OUTRR Right Rear Speaker Output O
17 OUTLR Left Rear Speaker Output O
18 OUTRF Right Front Spaeaker Output O
19 OUTLF Left Front Speaker Output O
20 CREF Reference Capacitor Pin S
(1) See input configuration tree and databyte specification ”configuration” Pin type legenda: I = Input O = Output I/O = Input/Output S = Supply TDA7403
Internal beep with 2 frequencies(selectable) Mixable phone and beep signals Loudness First or second order frequency response Programmable center frequencyand qualityfactor 15 x 1dB steps Selectable flat-mode (constant attenuation) Volume control 1dB attenuator Max. gain 20dB Max. attenuation 79dB Soft-step gain control Bass Control 2nd order frequency response Center frequency programmable in 4(5) steps DC gain programmable 7 x 2dB steps Treble Control 2nd order frequency response Center frequency programmable in 4 steps 7 x 2dB steps Speaker Control 4 independentspeaker controls (1dB steps control range 50dB) Mute Functions Direct mute driven by pin SM Digitally controlled softmute with 4 program- mable time constants ELECTRICAL CHARACTERISTICS (V S = 9V; Tamb =2 5°C; RL = 10KΩ ; all gains = 0dB; f = 1KHz; unless otherwise specified). Symbol Parameter Test Condition Min. Typ. Max. Unit INPUT SELECTOR R in Input Resistance all inputs except Phone 70 100 130 K Ω VCL Clipping Level 2.2 2.6 V RMS SIN Input Separation 80 100 dB G IN MIN Min. Input Gain -1 0 1 dB G IN MAX Max. Input Gain 14 dB G STEP Step Resolution 2 dB VDC DC Steps Adjacent Gain Step 0 mV G MIN to GMAX 1m V BEEP CONTROL VRMS Beep Level 350 mV fBMIN Lower Beep Frequency 600 Hz fBMAX Higher Beep Frequency 1.2 KHz MIXING CONTROL M LEVEL Mixing Level Source 0 dB Source -6 dB Source -12 dB Beep/Phone 0 dB TDA7403
ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit VOLUME CONTROL G MAX Max Gain 20 dB AMAX Max Attenuation 79 dB ASTEP Step Resolution 1 dB EA Attenuation Set Error G = -20 to 20dB -1.25 0 1.25 dB G = -60 to 20dB -4 0 3 dB E T Tracking Error 2d B VDC DC Steps Adjacent Attenuation Steps 0.1 3 mV From 0dB to GMIN 0.5 5 mV LOUDNESS CONTROL ASTEP Step Resolution 1 dB AMAX Max. Attenuation 15 dB fCMIN Lower Center Frequency 200 Hz fCMAX Higher Center Frequency 400 Hz SOFT MUTE AMUTE Mute Attenuation 70 100 dB TD Delay Time T1 0.48 ms T2 0.96 ms T3 40.4 ms T4 324 ms V THlow Low Threshold for SM Pin(1) 1V VTHhigh High Threshold for SM Pin 2.5 V R PU Internal Pull-up Resistor 70 100 130 K Ω VPU Pull-up Voltage 4.7 V SOFT STEP TSW Switch Time 10 ms BASS CONTROL C RANGE Control Range ±14 dB ASTEP Step Resolution 2 dB fC Center Frequency f C1 60 Hz fC2 70 Hz fC3 80 Hz fC4 100(2) Hz Q BASS Quality Factor Q 1 1 Q 2 1.25 Q 3 1.5 Q 4 2 DC GAIN Bass-Dc-Gain DC = off 0 dB DC = on 4.4 dB 1) SM pin is active low (mute condition) 2) See description of Audioprocessor Part - Bass & Treble filter characteristics programming TDA7403
ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit TREBLE CONTROL C RANGE Control Range ±14 dB ASTEP Step Resolution 2 dB fC Center Frequency f C1 10 KHz fC2 12.5 KHz fC3 15 KHz fC4 17.5 KHz SPEAKER ATTENUATORS C RANGE Control Range 50 dB ASTEP Step Resolution 1 dB AMUTE Output Mute Attenuation 80 90 dB EE Attenuation Set Error 2 dB VDC DC Steps Adjacent Attenuation Steps 0.1 5 mV AUDIO OUTPUTS VCLIP Clipping Level d = 0.3% 2.2 2.6 V RMS R L Output Load Resistance 2 K Ω C L Output Load Capacitance 10 nF R OUT Output Impedance 30 120 Ω VDC DC Voltage Level 3.8 V GENERAL eNO Output Noise BW = 20 Hz to 20 KHz output muted 3 µV BW = 20 Hz to 20 KHz all gain = 0dB 6.5 µV S/N Signal to Noise Ratio all gain = 0dB flat; V O =2 VRMS 110 dB bass treble at 12dB; VO = 2.6VRMS 100 dB d Distortion V IN =1 VRMS ; all stages 0dB 0.002 % VIN =1 VRMS ; Bass& Treble = 12dB 0.05 % SC Channel separation Left/Right 80 100 dB E T Total Tracking Error A V = 0 to -20dB 0 1 dB AV = -20 to -60dB 0 2 dB TDA7403
ELECTRICAL CHARACTERISTICS (VS = 9V; deemphasis time constant = 50µs, VMPX = 500mV, 75KHz deviation, f = 1KHz. GI= 6dB, Tamb =2 5°C; unless otherwise specified). Symbol Parameter Test Condition Min. Typ. Max. Unit VIN MPX Input Level Input Gain = 3.5dB 0.5 1.25 V RMS R in Input Resistance 100 K Ω G min Minimum Input Gain 3.5 dB G max Max Input Gain 11 dB G STEP Step Resolution 2.5 dB SVRR Supply Voltage Ripple Rejection Vripple= 100mv, f = 1khz 60 dB α Max Channel Separation 50 dB THD Total Harmonic Distortion 0.02 0.3 % S + N N Signal plus Noise to Noise Ratio S = 2Vrms 91 dB MONO/STEREO SWITCH VPTHST1 Pilot Threshold Voltage for Stereo, PTH = 1 15 mV VPTHST0 Pilot Threshold Voltage for Stereo, PTH = 0 25 mV VPTHMO1 Pilot Threshold Voltage for Mono, PTH = 1 12 mV VPTHMO0 Pilot Threshold Voltage for Stereo, PTH = 0 19 mV PLL Δ f/f Capture Range 0.5 % DEEMPHASIS and HIGHCUT τHC50 Deemphasis Time Constant Bit = 7, Subadr. 10 = 0 VLEVEL >> VHCH 50 µs τHC75 Deemphasis Time Constant Bit = 7, Subadr. 10 = 1 VLEVEL >> VHCH 75 µs τHC50 Highcut Time Constant Bit = 7, Subadr. 10 = 0 VLEVEL >> VHCL 150 µs τHC75 Highcut Time Constant Bit = 7, Subadr. 10 = 1 VLEVEL >> VHCL 225 µs STEREOBLEND and HIGHCUT-CONTROL REF5V Internal Reference Voltage 5 V TC REF5V Temperature Coefficient 3300 ppm LGmin Min. LEVEL Gain 0 dB LGmax Max. LEVEL Gain 10 dB LGstep LEVEL Gain Step Resolution 0.67 dB VSBL min Min.Voltage for Mono 33 %REF5V VSBL max Max. Voltage for Mono 58 %R EF5 V VSBL step Step Resolution 8.4 %REF5V STEREODECODER PART No external components necessary PLL with adjustment free fully integrated VCO Automatic pilot dependent MONO/STEREO switching Very high suppression of intermodulation and interference Programmable Roll-Off compensation Dedicated RDS Softmute Highcut and Stereoblend characterisctics pro- grammable in a wide range Internal Noiseblanker with threshold controls Multipath detector with programmable inter- nal/external influence I 2C bus control of all necessary functions TDA7403
ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit STEREOBLEND and HIGHCUT CONTROL VHCH min Min.Voltage for NO Highcut 42 %REF5V VHCH max Max. Voltage for NO Highcut 66 %REF5V VHCH step Step Resolution 8.4 %REF5V VHCL min Min. Voltage for FULL High cut 17 %VHCH VHCL max Max. Voltage for FULL High cut 33 %VHCH Carrier and harmonic suppression at the output α 19 Pilot Signal f = 19KHz 50 dB α 38 Subcarrier f = 38KHz 75 dB α 57 Subcarrier f = 57KHz 62 dB α 76 Subcarrier f = 76KHz 90 dB Intermodulation (Note1) α 2 Pilot Signal f mod = 10KHz; fspur = 1KHz; 65 dB α 3f mod = 13KHz; fspur = 1KHz; 75 dB Traffic Radio (Note 2) α 57 Signal f = 57KHz 70 dB SCA - Subsidiary Communications Authorization (Note 3) α 67 Signal f = 67KHz 75 dB ACI - Adjacent Channel Interference (Note 4) α 114 Signal f = 114KHz 95 dB α 190 Signal f = 190KHz 84 dB Notes to the characteristics: 1. Intermodulation Suppression: measured with: 91% pilot signal; fm = 10kHz or 13kHz. 2. Traffic Radio (V.F.) Suppression: measured with: 91% stereo signal; 9% pilot signal; fm=1kHz; 5% subcarrier (f = 57kHz, fm = 23Hz AM, m = 60%) 3. SCA ( Subsidiary Communications Authorization ) measured with: 81% mono signal; 9% pilot signal; fm = 1kHz; 10%SCA - subcarrier ( fs = 67kHz, unmodulated ). 4. ACI ( Adjacent Channel Interference ) measured with: 90% mono signal; 9% pilot signal; fm =1kHz; 1% spurious signal ( fs = 110kHz or 186kHz, unmodulated). TDA7403
ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit VTR Trigger Threshold0) 1) meas. with VPEAK = 0.9V NBT = 111 30 mV OP NBT = 110 35 mV OP NBT = 101 40 mV OP NBT = 100 45 mV OP NBT = 011 50 mV OP NBT = 010 55 mV OP NBT = 001 60 mV OP NBT = 000 65 mV OP VTRNOISE Noise Controlled Trigger Threshold2) meas. with VPEAK = 1.5V NCT = 00 260 mV OP NCT = 01 220 mV OP NCT = 10 180 mV OP NCT = 11 140 mV OP VRECT Rectifier Voltage V MPX = 0mV 0.9 V VMPX = 50mV; f = 150KHz 1.7 V VMPX = 100mV; f = 150KHz 2.5 V VRECT DEV deviation dependent rectifier Voltage3) means. with V MPX = 800mV (75KHz dev.) OVD = 11 0.9(off) V OP OVD = 10 1.2 V OP OVD = 01 2.0 V OP OVD = 00 2.8 V OP VRECT FS Fieldstrength Controlled Rectifier Voltage4) means. with V MPX = 0mV VLEVEL << VSBL (fully mono) FSC = 11 0.9(off) V FSC = 10 1.3 V FSC = 01 1.8 V FSC = 00 2.3 V 0) All thresholds are measured using a pulse with TR =2 µs, THIGH =2 µs and TF =1 0µs. 1) NBT represents the Noiseblanker-Byte bits D2; D0 for the noise blanker trigger threshold 2) NAT represents the Noiseblanker-Byte bit pair D4,D3 for the noise controlled trigger adjustment 3) OVD represents the Noiseblanker-Byte bit pair D7,D6 for the over deviation detector 4) FSC represents the Fieldstrength-Byte bit pair D1,D0 for the fieldstrength control VOP V IN DC TR THIGH TF Time D97AU636 NOISE BLANKER PART internal 2nd order 140kHz high pass filter programmable trigger threshold additional circuits for trigger adjustment (devia- tion, field-strenght) very low offset current during hold time four selectable pulse suppression times TDA7403
8 STEPS
Figure 13. Trigger Threshold vs. VPEAK Figure 14. Deviation Controlled Trigger Figure 15. Fieldstrength Controlled Trigger Figure 16. Block diagram of the stereo decoder
The stereodecoder part of the TDA7403 (see Fig. ”stereoblend” and ”highcut” functions. low to use different IF devices. ately and the audioprocessor is softly unmuted. the coupling capacitor through leakage currents. this stage also the 19 kHz pilot tone is cancelled. 75µs (bit D7, Stereodecoderbyte). tween the VHCH and VHCL values. bus (bit D7, Fieldstrength byte set to ”0”). Figure 17. Signals during stereodecoder’s
even if using a low threshold. D0 and D1 of the fieldstrength control byte. pendent threshold adjustment. (the first step turns off the detector, see fig. 15). are shown in the software specification. Figure 23. Application Example.
I2C BUS INTERFACE DESCRIPTION Interface Protocol The interface protocol comprises: -a start condition (S) -a chip address byte (the LSB bit determines read / write transmission) -a subaddress byte -a sequence of data (N-bytes + acknowledge) -a stop condition (P) D97AU627 S1000110 R / W A C K A C K A C KP MSB LSB MSB LSB MSB LSB CHIP ADDRESS XI SUBADDRESS DATA 1 to DATA n AZ T A3 A2 A1 A0 DATA S = Start ACK = Acknowledge AZ = AutoZero-Remain T = Testing I = Autoincrement P = Stop MAX CLOCK SPEED 500kbits/s The transmitted data is automatically updated af- ter each ACK. Transmission can be repeated without new chip address. Auto increment If bit I in the subaddress byte is set to ”1”, the autoincrement of the subaddress is enabled. TRANSMITTED DATA (send mode) MSB LSB XXXX S T S M XX SM = Soft mute activated ST = Stereo X = Not Used SUBADDRESS (receive mode) MSB LSB FUNCTION X A Z T I A 3A 2A 1A 0 Not allowed Loudness / Auto-Zero Volume Softmute / Beep Bass / Treble Attenuator Bass / Treble Configuration Speaker attenuator LF Speaker attenuator LR Speaker attenuator RF Speaker attenuator RR / Blanktime adjust Stereodecoder Noiseblanker Fieldstrength Control Configuration Stereodecoder Adjustment Testing T = Testmode I = Autoincrement AZ = Auto Zero Remain X = not used TDA7403
don’t use Cassette don’t use AM Stereo Decoder Input FM Mute don’t use CD Mode CD Full-differential CD Quasi-diff AM/FM Mode AM mono AM stereo AM through Stereo/Decoder FM- Stereo/Decoder In-Gain 14dB 12dB 2d B 0d B For example to select the CD input in quasi-differential mode with gain of 8dB the Data Byte is: 0/01111000 Loudness MSB LSB LOUDNESS D7 D6 D5 D4 D3 D2 D1 D0 Attenuation 0dB -1dB -14dB -15dB Filter on off (flat) Center Frequency 200Hz 400Hz Loudness Q low (1 storder) normal (2nd order) 1 must be ”1” Note: The attenuation is specified at high frequencies. Around the center frequency the value is different depending on the programmed attenuation (see Loudness frequency response). TDA7403
Mute, Beep and Mixing MSB LSB MUTE/BEEP/MIXING D7 D6 D5 D4 D3 D2 D1 D0 Mute Enable Softmute Disable Softmute Mute time =0.48 ms Mute time =0.96 ms Mute time =40.4 ms Mute time =324 ms Stereo Decoder Softmute Influence = off Stereo Decoder Softmute Influence = on Beep Beep Frequency = 600Hz Beep Frequency = 1.2KHz Mixing Mix-Source = Beep Mix-Source = Phone Full Mix Signal Source -12dB + Mix-Signal -2.5dB Source -6dB + Mix-Signal -6dB Full Source Note: for more information to the Stereodecoder -Softmute-Influence please refer to the stereodecoder description. Volume MSB LSB ATTENUATION D7 D6 D5 D4 D3 D2 D1 D0 Gain/Attenuation +32dB +31dB +20dB +19dB +18dB +1dB 0dB - 1dB -78dB -79dB Softstep Softstep Volume = off Softstep Volume = on Note: It is not recommended to use a gain more than 20dB for system performance reason. In general, the max. gain should be limited by software to the maximum value, which is needed for the system. TDA7403
Bass & Treble Attenuation MSB LSB BASS & TREBLE ATTENUATION D7 D6 D5 D4 D3 D2 D1 D0 Treble Steps -14dB -12dB -2dB 0dB 0dB +2dB +12dB +14dB Bass Steps -14dB -12dB -2dB 0dB 0dB +2dB +12dB +14dB For example 12dB Treble and -8dB Bass give the following DATA BYTE : 0 0 1 1 1 0 0 1. Bass & Treble Filter Characteristics MSB LSB BASS & TREBLE FILTER D7 D6 D5 D4 D3 D2 D1 D0 Treble Center Frequency = 10 KHz Center Frequency = 12.5 KHz Center Frequency = 15 KHz Center Frequency = 17.5 KHz Bass Center Frequency = 60 Hz Center Frequency = 70 Hz Center Frequency = 80 Hz Center Frequency = 100Hz Center Frequency = 150Hz Quality factor = 1 Quality factor = 1.25 Quality factor = 1.5 Quality factor = 2 DC-Gain = 0dB DC-Gain =±4.4dB 1 must be ”1” For example Treble center frequency = 15kHz, Bass center frequency = 100Hz, Bass Q = 1 and DC = 0dB give the following DATA BYTE: 1 0001 110 TDA7403
Speaker Attenuation (LF, LR, RF, RR) MSB LSB D7 D6 D5 D4 D3 D2 D1 D0 Attenuation 0dB -1dB -23dB -24.5dB -26dB -28dB -30 -32dB -35dB -40dB -50dB Speaker Mute Must be ”1” (except RR speaker; see below) Blank Time adj.(only at RR speaker) 38µs 25.5µs 32µs 22µs Stereodecoder MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 STD Unmuted STD Muted IN-Gain 11dB IN-Gain 8.5dB IN-Gain 6dB IN-Gain 3.5dB 1 must be ”1” Forced MONO MONO/STEREO switch automatically Pilot Threshold HIGH Pilot Threshold LOW Deemphasis 50µs Deemphasis 75µs TDA7403
Noise Controlled Threshold 320mV Noise Controlled Threshold 260mV Noise Controlled Threshold 200mV Noise Controlled Threshold 140mV Noise blanker OFF Noise blanker ON Over deviation Adjust 2.8V Over deviation Adjust 2.0V Over deviation Adjust 1.2V Over deviation Detector OFF Fieldstrength Control MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 Noiseblanker Field strength Adj 2.3V Noiseblanker Field strength Adj 1.8V Noiseblanker Field strength Adj 1.3V Noiseblanker Field strength Adj OFF VSBL at 33% REF 5V VSBL at 42% REF 5V VSBL at 50% REF 5V VSBL at 58% REF 5V VHCH at 42% REF 5V VHCH at 50% REF 5V VHCH at 58% REF 5V VHCH at 66% REF 5V VHCL at 17% VHCH VHCL at 33% VHCH High cut OFF High cut ON TDA7403
20.2% 21.9% 25.5% 31.0% LEVEL Gain 0dB 0.66dB 1.33dB 10dB Temperature compensation at LEVEL input TC = 0 TC = 16.7mV/K (3300ppm) Testing MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 Stereodecoder test signals OFF Test signals enabled if bit D5 of the subaddress (test mode bit) is set to ”1”, too External Clock Internal Clock Testsignals at CASS_R VHCCH Level intern Pilot magnitude VCOCON; VCO Control Voltage Pilot threshold HOLDN NB threshold F228 VHCCL VSBL not used not used PEAK not used REF5V not used VCO OFF ON Audioprocessor test mode only if bit D5 of the subaddress (test mode bit) is set to ”1” OFF Note : This byte is used fortesting or evaluation purposes only andmust not be set to other values than thedefault ”11111110” in theapplication! TDA7403
A eB D E L K H A1 C SO20MEC hx4 5° SO20 DIM. mm inch A 2.35 2.65 0.093 0.104 A1 0.1 0.3 0.004 0.012 B 0.33 0.51 0.013 0.020 C 0.23 0.32 0.009 0.013 D 12.6 13 0.496 0.512 E 7.4 7.6 0.291 0.299 e 1.27 0.050 H 10 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 L 0.4 1.27 0.016 0.050 K0 °(min.)8°(max.) OUTLINE AND MECHANICAL DATA TDA7403
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com TDA7403