7390

FAN7390 FAIRCHILD | Alldatasheet

Document overview

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Technical content

Features

„ Floating Channels for Bootstrap Operation to +600V „ Typically 4.5A/4.5A Sourcing/Sinking Current Driving Capability „ Common-Mode dv/dt Noise Canceling Circuit „ Built-in Under-Voltage Lockout for Both Channels „ Matched Propagation Delay for Both Channels „ Logic (VSS) and Power (COM) Ground +/- 7V Offset „ 3.3V and 5V Input Logic Compatible „ Output In-phase with Input

Applications

„ PDP Sustain Driver „ HID Lamp Ballast „ SMPS „ Motor Driver

Description

The FAN7390 is a monolithic high- and low-side gate- drive IC, which can drive high speed MOSFETs and IGBTs that operate up to +600V. It has a buffered output stage with all NMOS transistors designed for high pulse current driving capability and minimum cross-conduction. Fairchild’s high-voltage process and common-mode noise canceling techniques provide stable operation of the high-side driver under high dv/dt noise circumstances. An advanced level shift circuit offers high-side gate driver operation up to V S=-9.8V (typical) for VBS=15V. The UVLO circuit prevents malfunction when V DD and VBS are lower than the specified threshold voltage. The high current and low output voltage drop feature make this device suitable for the PDP sustain pulse driver, motor driver, switching power supply, and high- power DC-DC converter applications.

Ordering Information

For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. 8-SOP 8-DIP 14-SOP Part Number Package Operating Temperature Range Eco Status Packing Method FAN7390N 8-DIP -40°C ~ 125°CR o H S Tube FAN7390M 8-SOP Tube FAN7390MX Tape & Reel FAN7390M1 14-SOP Tube FAN7390M1X Tape & Reel

Figure 3. Functional Block Diagram (Referenced 8-SOP/DIP) Figure 4. Functional Block Diagram (Referenced 14-SOP)

1 NOISE

Figure 5. Pin Assignments (Top View)

© 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.2 5 FAN7390 — High-Current, High & Low Side, Gate-Drive IC Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera- ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi- tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C, unless otherwise specified. Notes: 2. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 3. Do not exceed P D under any circumstances. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Characteristics Min. Max. Unit VS High-Side Floating Supply Offset Voltage V B-25 V B+0.3 V VB High-Side Floating Supply Voltage -0.3 625.0 V VHO High-Side Floating Output Voltage HO V S-0.3 V B+0.3 V VDD Low-Side and Logic Fixed Supply Voltage -0.3 25.0 V VLO Low-Side Output Voltage LO -0.3 V DD+0.3 V VIN Logic Input Voltage (HIN and LIN) V SS-0.3 V DD+0.3 V VSS Logic Ground (FAN7390M1 only) V DD-25 V DD+0.3 V dVS/dt Allowable Offset Voltage Slew Rate 50 V/ns PD Power Dissipation(1)(2)(3) 8-DIP 1.25 W8-SOP 0.625 14-SOP 1.0 θJA Thermal Resistance, Junction-to-Ambient 8-DIP 100 °C/W8-SOP 200 14-SOP 110 TJ Junction Temperature +150 °C TSTG Storage Temperature +150 °C Symbol Parameter Min. Max. Unit VB High-Side Floating Supply Voltage V S+10 V S+20 V VS High-Side Floating Supply Offset Voltage 6-V DD 600 V VHO High-Side Output Voltage V S VB V VDD Low-Side and Logic Supply Voltage 10 20 V VLO Low-Side Output Voltage COM V DD V VIN Logic Input Voltage (HIN and LIN) V SS VDD V TA Operating Ambient Temperature -40 +125 °C

© 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.2 6 FAN7390 — High-Current, High & Low Side, Gate-Drive IC

Electrical Characteristics

VBIAS (VDD, VBS)=15.0V, VS=VSS=COM, TA=25°C, unless otherwise specified. The V IL, VIH, and I IN parameters are referenced to VSS/COM and are applicable to the respective input signals HIN and LIN. The VO and IO parameters are referenced to COM and VS is applicable to the respective output signals HO and LO. Note: 4. This parameter guaranteed by design. Dynamic Electrical Characteristics VBIAS (VDD, VBS)=15.0V, VS=VSS=COM=0V, CL=1000pF and TA=25°C unless otherwise specified. Symbol Characteristics Test Condition Min. Typ. Max. Unit POWER SUPPLY SECTION (VDD AND VBS) VDDUV+ VBSUV+ VDD and VBS Supply Under-Voltage Positive-going Threshold 8.0 8.8 9.8 VVDDUV- VBSUV- VDD and VBS Supply Under-Voltage Negative-going Threshold 7.4 8.3 9.0 VDDUVH VBSUVH VDD and VBS Supply Under-Voltage Lockout Hysteresis Voltage 0.5 ILK Offset Supply Leakage Current V B=VS=600V 50 µAIQBS Quiescent VBS Supply Current V IN=0V or 5V 45 80 IQDD Quiescent VDD Supply Current V IN=0V or 5V 75 110 IPBS Operating VBS Supply Current f IN=20kHz, rms value 530 640 µAIPDD Operating VDD Supply Current f IN=20kHz, rms value 530 640 LOGIC INPUT SECTION (HIN, LIN) VIH Logic "1" Input Voltage 2.5 VVIL Logic "0" Input Voltage 1.2 IIN+ Logic "1" Input Bias Current V IN=5V 25 50 µAIIN- Logic "0" Input Bias Current V IN=0V 1.0 2.0 RIN Input Pull-down Resistance 100 200 K Ω GATE DRIVER OUTPUT SECTION (HO, LO) VOH High-level Output Voltage, VBIAS-VO No Load 1.0 V VOL Low-level Output Voltage, VO No Load 35 mV IO+ Output High, Short-circuit Pulsed Current(4) VO=0V, VIN=5V with PW<10µs 3.5 4.5 A IO- Output Low, Short-circuit Pulsed Current(4) VO=15V, VIN=0V with PW<10µs 3.5 4.5 VS Allowable Negative VS Pin Voltage for HIN Signal Propagation to HO -9.8 -7.0 V VSS- COM VSS-COM/COM-VSS Voltage Educability -7.0 7.0 V Symbol Characteristics Test Condition Min. Typ. Max. Unit ton Turn-on Propagation Delay V S=0V 140 200 ns toff Turn-off Propagation Delay V S=0V 140 200 MT Delay Matching, HS & LS Turn-on/off 0 50 tr Turn-on Rise Time 25 50 tf Turn-off Fall Time 20 45

Figure 29. 8-Lead Small Outline Package (SOP) specifically the warranty therein, which covers Fairchild products. http://www.fairchildsemi.com/packaging/. B) ALL DIMENSIONS ARE IN MILLIMETERS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M.

1.75 MAX

Figure 30. 8-Lead Dual In-Line Package (DIP) specifically the warranty therein, which covers Fairchild products. http://www.fairchildsemi.com/packaging/.

Figure 31. 14-Lead Small Outline Package (SOP) specifically the warranty therein, which covers Fairchild products.

0.343 MAX

FAN7390 — High-Current, High & Low Side, Gate-Drive IC © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7390 Rev. 1.0.2 15