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v1.2 © 2008–2011 Teridian Semiconductor Corporation 1 A Maxim Integrated Products Brand GENERAL DESCRIPTION The 71M6103/71M6113/71M6201/71M6203/71M6601/71M6603 (71M6xxx) isolated sensor ICs enable Teridian’s 4th -generation polyphase-metering 71M654x systems-on-chips ( SoCs) to u se nonisolating sensors such as resistive shunts without the need for costly and nonlinear isolation transformers or CTs. Isolation is provided by low-cost pulse transformers that form a bidirectional digital communication link between the 71M654x and the isolated sensor ICs. The 71M6xxx isolated sensor ICs contain a 22- bit delta-sigma ADC, an amplifier with differential inputs, a precision voltage reference, a temperature sensor, and a supply voltage generator that is energized by power pulses provided by the 71M654x. In conjunction with the 71M654x metering SoCs, the i solated sensor ICs offer unprecedented BOM cost reduction, immunity to magnetic tampering, and enhanced reliability for single-phase and polyphase applications. MPU RTC TIMERS IADC0 VADC8 (VA) IADC2 VADC9 (VB) XIN XOUT RX TX TX RX COM0...5 V3P3A V3P3SYS VBAT VBAT_RTC IADC4 VADC10 (VC) SEG GNDA GNDD SEG/DIO DIO ICE C B A NEUTRAL LOAD 8888.8888 PULSES, DIO IR AMR POWER FAULT COMPARATOR MODUL- ATOR SERIAL PORTS OSCILLATOR/ PLL MUX and ADC LCD DRIVER DIO, PULSES COMPUTE ENGINE FLASH MEMORY RAM 32 kHz REGULATOR Shunt Current Sensors POWER SUPPLY TERIDIAN 71M6543F/ 71M6543H TEMPERATURE SENSOR VREF IADC6 BATTERY PWR MODE CONTROL WAKE-UP NEUTRAL I2C or µWire EEPROM 9/17/2010 IADC1 IADC3 IADC5 IADC7 RTC BATTERY V3P3D BATTERY MONITOR SPI INTERFACEHOST LCD DISPLAY Resistor Dividers Pulse Transformers 3x TERIDIAN 71M6xx3 Note: This system is referenced to Neutral 71M6xx3 71M6xx3 71M6xx3 }IN* }IA }IB }IC *IN = Neutral Current
FEATURES
- 0.1% Accuracy Over 2000:1 Current Range
- Exceeds IEC 62053/ANSI C12.20 Standards
- Compatible with Shunt Resistors as Low as 50µΩ
- On-Chip Temperature Sensor Enables Localized Digital Temperature Compensation by the 71M654x
- 22-Bit ADC
- Powered from the 71M654x Using Pulses Sent Through the Transformer
- 3.3mW Typical Consumption
- On-Chip Power Monitoring
- Industrial Temperature Range
- 8-Pin Lead(Pb)-Free SO Package 19-5704; Rev 6/11
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 2 Table of Contents
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 4
1 HARDWARE DESCRIPTION
The 71M6103/71M6113/71M6201/71M6203/71M6601/71M6603 (71M6xxx) remote sensor ICs integrate all functional blocks required to implement an isolated front -end with digital communication capability . Figure 1 shows the 71M6xxx IC block diagram. The chip includes the following:
- Preamplifier with a fixed gain
- 22-bit delta-sigma ADC
- ADC voltage reference
- Temperature sensor
- VCC monitor
- Power-on reset circuitry
- Bidirectional pulse interface
- Active rectifiers for supply-voltage generation from the power pulses provided by the 71M654x
- Digital control section providing control registers for the selection of operation modes SP SN PLL PULSEIO Secondary ACTIVE RECTI- FIERS GND VCC RD_DATA DIGITAL SECTION INP INN ADC ADC_CLK ADC_OUT BAND GAPCHOP IBIAS TEMP/VCC MONITOR OTP MEMORY BUFFER VREF VBIAS TEST DATA_IN[15:0] CROSS VCC WR_DATA POWER ON RESET RESET RD_CLK VDD RD_DATA PREAMP Primary 1:1.1 To 71M654X SHUNT Figure 1: Block Diagram
2 FUNCTIONAL DESCRIPTION
During normal operation, the SP and SN pins of the 71M6xxx are connected to the pulse transformer. When PLL_FAST = 1 in the 71M654x, power pulses generated by the 71M 654x arrive every 610.35ns. The PLL in the 71M6xxx locks to these incoming power pulses. The communication between the 71M654x and the 71M6xxx is synchronized to the multiplexer frames of the 71M 654x. The communication protocol is Teridian-proprietary, and det ails are not described in this data sheet. All aspects of the communication between the 71M 654x and the 71M 6xxx are managed on the hardware level and they are completely transparent to the user. The communication interface can run at two different data rat es. Power pulses are generated every 610.35ns if the PLL_FAST register in the 71M654x is set to 1, and every 1.905µs if PLL_FAST is set to 0. The power pulses are 101.7ns wide with PLL_FAST = 1, and 160ns wide with PLL_FAST = 0.
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 5 The 71M6xxx isolated sensors provide a continuous data stream of ADC data plus an independent data stream that contains auxiliary information as requested by the 71M 654x. The ADC data is processed by CE code in the 71M 654x and stored in CE RAM. Auxiliary information is processed by the MPU of the 71M654x using I/O RAM registers. Basic settings and functions of the 71M 6xxx can be controlled by various I/O RAM registers in the 71M654x. The command sent towards the 71M6xxx is placed in the RCMD[4:2] register of the 71M654x, with f urther specification contained in the TMUXRn[2:0] register. Refer to the 71M 654x data sheets for details. Table 1 shows the allowable combinations of values in RCMD[4:2] and TMUXRn[2:0] , and the achieved operation along with the type and format of data sent back by the 71M6xxx isolated sensors. Table 1: Remote Interface Commands RCMD[4:2] TMUXRn[2:0] Read Operation/Command R6K_RD [15:0] 001 00X Chip-characteristic temperature data TRIMT (see note), use bits [8:1] 001 01X TRIMBGC (see note), use bits [15:6] 001 10X TRIMBGA (see note), use bits [15:8] 001 11X TRIMBGB bits [15:8], TRIMBGD bits [7:0] (see note) 010 00X Temperature Output of the temperature sensor, bits [10:0] 010 01X Supply voltage Supply voltage measurement , bits [7:0] 010 10X Chip version Chip version code, use bits [15:8] 110 111 Reset — Note: TRIMBGA to TRIMBGD and TRIMT are values used for characterizing the individual 71M6xxx over temperature. Availability of TRIMBGA to TRIMBGD and TRIMT depends on the part number (see Table 10 for details). The remote interface commands listed in Table 1 enable the 71M654x to gather the following information from the 71M6xxx:
- Output of the temperature sensor
- Information on how the device is characterized over temperature
- Supply voltage
- Chip version code The control commands listed in Table 1 enable the 71M 654x to initiate the following actions in the 71M6xxx:
- Read the 71M6xxx temperature sensor
- Read the 71M6xxx VCC sensor
- Hardware reset With hardware and temperature characterization information on each connected 71M6xxx isolated sensor available to the 71M 654x host MPU , temperature compensation of the energy measurement can be implemented based on the individual temperatur e characteristics of the 71M 6xxx isolated sensors. For example, when the 71M6xxx are used in a polyphase meter containing three shunt resistors, the temperature increase in each 71M 6xxx can be monitored and used to compensate for the temperature coefficient of the 71M6xxx VREF and the corresponding shunt resistor.
3 APPLICATIONS INFORMATION
3.1 Product Selection
A low-noise differential-input preamplifier applies gain to the signal from the current sensor to the optimal input range of the ADC. The current sensor is connected to the inputs of the preamplifier through INP and INN. The output of the preamplifier connects directly to the input of the ADC. See 5 Ordering Information for available part types. S hunt resistances from 736 µΩ to as low as 5 0µΩ can be accommodated, depending on desired current range and part type.
Table 2. Various combinations of current ranges and shunt resistance values are possible. However, the consideration that applies to the resistance range of the shunt. Note 1: S = single phase, P = polyphase . Note 3: Maximum resistance at maximum current . Note 4: Power at maximum current and typical shunt resistance . Note 5: Typical resistance values provide room for overhead while maintaining optimum dynamic range. Current Sensor Side for details.
3.2 External Components for the 71M6xxx
3.2.1 Current Sensor Side
- 1.0µF capacitor between the GND and VCC pins. This capacitor minimizes the VCC ripple voltage.
- One 1kΩ resistor each from the sensor output pins to GND. These resistors help to bias the input voltage at the INP and INN pins towards GND.
- In environments where EMC is a concern, ferrite beads can be placed between the sense pins of the shunt resistor and the INP/INN pins of the 71M6xxx.
3.2.2 Pulse Transformer
- Würth Electronics Midcom Inc., P/N 750-11-0056 REV 2 (www.midcom-inc.com)
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 7 Current Shunt Sensor Pulse Transformer TERIDIAN 71M654x TERIDIAN 71M6xxx VCCGND INP INN SP SN 1 kΩ 1 kΩ 1. 0 µF V3P3A VA IAP IAN Load Voltage Sensing 8 2 3 4 5 6 7 1 TEST NC Figure 2: External Components Connected to the 71M6xxx
3.3 Connections to Sensors and to the 71M654x
Figure 3 shows the sensor connections for single-phase meter application using a 71M6541 D/F and 71M6x01. This single-phase configuration uses one local shunt and one shunt isolated with a 71M6x01 device. Since the local shunt is connected to the LINE circuit, the meter is also referenced to the LINE circuit. Figure 4 shows the sensor connections for a polyphase meter application using a 71M6543F/H or 71M6545/H. This polyphase configuration uses three 71M6xx3 to isolate the shunt sensors for the three phases, while a locally connected fourth shunt sensor can be optionally used to sense neutral current. Since the local shunt is connected to the neutral circuit, the meter is also referenced to the neutral circuit.
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 8 MPU RTC TIMERS IAP VA IBP XIN XOUT RX TX TX RX COM0...5 V3P3A V3P3SYS VBAT VBAT_RTC SEG GNDA GNDD SEG/DIO DIO ICE LINE NEUTRAL LOAD 8888.8888 PULSES, DIO IR AMR POWER FAULT COMPARATOR MODUL- ATOR SERIAL PORTS OSCILLATOR/ PLL MUX and ADC LCD DRIVER DIO, PULSES COMPUTE ENGINE FLASH MEMORY RAM 32 kHz REGULATOR Shunt POWER SUPPLY TERIDIAN 71M6541D/F TEMPERATURE SENSOR VREF BATTERY PWR MODE CONTROL WAKE-UP NEUTRAL I2C or µWire EEPROM IAN IBN RTC BATTERY V3P3D BATTERY MONITOR SPI INTERFACEHOST LCD DISPLAY Resistor Divider Pulse Trans- former TERIDIAN 71M6x01 Shunt LINE LINE Note: This system is referenced to LINE 11/5/2010 Figure 3: Current Sensors Connected to the 71M6541D/F Using One 71M6x01
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 9 MPU RTC TIMERS IADC0 VADC8 (VA) IADC2 VADC9 (VB) XIN XOUT RX TX TX RX COM0...5 V3P3A V3P3SYS VBAT VBAT_RTC IADC4 VADC10 (VC) SEG GNDA GNDD SEG/DIO DIO ICE C B A NEUTRAL LOAD 8888.8888 PULSES, DIO IR AMR POWER FAULT COMPARATOR MODUL- ATOR SERIAL PORTS OSCILLATOR/ PLL MUX and ADC LCD DRIVER DIO, PULSES COMPUTE ENGINE FLASH MEMORY RAM 32 kHz REGULATOR Shunt Current Sensors POWER SUPPLY TERIDIAN 71M6543F/ 71M6543H TEMPERATURE SENSOR VREF IADC6 BATTERY PWR MODE CONTROL WAKE-UP NEUTRAL I2C or µWire EEPROM 9/17/2010 IADC1 IADC3 IADC5 IADC7 RTC BATTERY V3P3D BATTERY MONITOR SPI INTERFACEHOST LCD DISPLAY Resistor Dividers Pulse Transformers 3x TERIDIAN 71M6xx3 Note: This system is referenced to Neutral 71M6xx3 71M6xx3 71M6xx3 }IN* }IA }IB }IC *IN = Neutral Current Figure 4: Current Sensors Connected to the 71M6543F/H or 71M6545/H with Three 71M6xx3
3.4 PCB Layout Considerations
To limit emissions and susceptibility to electromagnetic and magnetic fields, the signal wiring between the shunt resistors and the 71M6xxx should be as short as possible and should consist of tightly twisted pair cable. Similarly, the PCB traces between the 71M 6xxx and the 71M 654x should be routed as short as possible and should be surrounded by grounded copper structures. The trace pairs should be routed as close to each other as permitted by the PCB manufacturer. The copper separation (gap) between the shunt side and the 71M 654x side of the signal transformer should be as wide as permitted by the footprint of the transformer, as shown in Figure 5.
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 10 Figure 5: Copper Separation and Signal Traces for a Polyphase PCB
3.5 Compatibility with the 71M654x
The 71M6xxx isolated sensor ICs are designed to be operated in conjunction with the 71M 654x energy- metering ICs. Operation of the 71M 6xxx isolated sensor ICs requires a 71M 654x IC with CE code capable of interfacing with the 71M 6xxx. CE codes written for operation with CTs do not work w ith the 71M6xxx. The 71M6xxx isolated sensor ICs are not arbitrarily interchangeable. Each type of the 71M 6xxx must be matched with its corresponding CE code in the 71M 654x per Table 14. A 71M 6xxx remote sensor IC generates unpredictable results when paired with a CE code for a different part number. All 71M 6xxx isolated sensor ICs used in a polyphase system must be of the same part number. Signal traces Isolation gap Transformers
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 11
4 SPECIFICATIONS
4.1 Absolute Maximum Ratings
Table 3 shows the absolute maximum ranges for the device. Stresses beyond Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation at these or any other conditions beyond those indicated under recom mended operating conditions (4.3 Recommended Operating Conditions ) is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. All voltages are with respect to GND. Table 3: Absolute Maximum Ratings SUPPLIES AND GROUND PINS: VCC -0.5V to 4.6V GND -0.1V to +0.1V ANALOG INPUT PINS: INP, INN, SP, SN -10mA to +10mA, -0.5V to (VCC + 0.5V) TEMPERATURE: Operating Junction Temperature (Peak, 100ms) +140°C Operating Junction Temperature (Continuous) +125°C Storage Temperature Range -45°C to +165°C Soldering Temperature (10s duration) +250°C
4.2 Recommended External Components
Table 4: Recommended External Components NAME FROM TO FUNCTION VALUE UNITS C1 VCC GND Bypass capacitor for supply 1.0 µF R1, R2 Sensor GND To establish proper bias for INP/INN pins 1 kΩ
4.3 Recommended Operating Conditions
Table 5: Recommended Operating Conditions PARAMETER CONDITIONS MIN TYP MAX UNITS VCC Supply Voltage 2.5 3.6 V Operating Temperature Range -40 +85 ⁰C
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 12
4.4 Performance Specifications
Unless otherwise specified, all parameters listed in this section are valid over the Recommended Operating Conditions provided in Table 5.
4.4.1 Supply Current
Table 6: Supply Current Performance Specifications PARAMETER CONDITIONS MIN TYP MAX UNITS VCC Current, Normal Operation VCC = 3.3V 0.77 1.05 mA
4.4.2 Power and Data Pulses
Table 7: Timing Specifications for Power and Data Pulses PARAMETER CONDITIONS MIN TYP MAX UNITS Pulse Frequency Normal operation 1.638 MHz 71M654x (PLL_FAST = 0) 0.5249
4.4.3 VCC Voltage Monitor
Table 8: VCC Voltage Monitor Specifications PARAMETER CONDITIONS MIN TYP MAX UNITS BNOM: Nominal Value, TA = +22°C VCC = 3.2V 138 LSB VCC Voltage (Note: This is a definition— it is not a measured quantity.) VCC = 3.195 + (BSENSE - 138) x 0.0246 + STEMP x 0.000104 V BE: Measurement Error VCC = 3.195 + (BSENSE - 138) x 0.0246 + STEMP x 0.000104 VCC = 2.5V -5 +5 VCC = 2.8V to 3.6V -5 +5
4.4.4 Temperature Sensor
Table 9: Temperature Sensor Specifications PARAMETER CONDITIONS MIN TYP MAX UNITS TNOM: Nominal Value, TA = +22°C VCC = 3.2V 870 LSB Temperature Equation for: 71M6601, 71M6603, 71M6103 and 71M6113 (Note: This is a definition—it is not a measured quantity.) TEMP = STEMP x 0.33 - STEMP2 x 3E-5 + 22 ºC Temperature Equation for: 71M6201 and 71M6203 (Note: This is a definition—it is not a measured quantity.) If STEMP < 0: TEMP = STEMP x 0.33 - STEMP2 x 3E-5 + 22 If STEMP ≥ 0: TEMP = STEMP x (63 / TRIMBGA) + 22 Temperature Error (Note 1) Temperature = -40°C, -10°C, +55°C, +85°C VCC = 2.8V to 3.6V -5 +5 ºC VCC = 2.5V to 2.79V -6.5 +6.5 TETIME: Duration of Temperature Measurement VCC = 3.0V 15 30 ms Note 1: Guaranteed by design; not production tested.
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 13
4.4.5 VREF Performance Specifications
Table 10 shows the performance specifications for the ADC reference voltage (VREF). Table 10: VREF Performance Specifications PARAMETER CONDITIONS MIN TYP MAX UNITS VREF Output Voltage 71M6201, 71M6203, 71M6113: TA = +22°C 1.193 1.195 1.197 V 71M6601, 71M6603, 71M6103: TA = +22°C 1.180 1.195 1.210 VREF Output Impedance ILOAD = 10µA, -10µA on TMUXOUT 8 kΩ VREF Power-Supply Sensitivity: ΔVREF/ΔVCC VCC = 2.8V to 3.6V -1.5 +1.5 mV/V VCC = 2.5V to 3.6V -2 +2 VREF Chop Step (Trimmed) VREF(CROSS = 1) - VREF(CROSS = 0) -22 0 +22 mV VNOM Definition VNOM(T) = VREF(22) + (T - 22)TC1 + (T - 22)2TC2 V 71M6201 AND 71M6203 (0.2% ACCURACY CLASS) VNOM Temperature Coefficients: TC1, TC2 TC1 = 0.0538 x TRIMT + 1.587(TRIMBGB - TRIMBGD) + 27.279 µV/°C TC2 = -0.433 - TRIMT x 0.000854 µV/°C2 VREF(T) Deviation from VNOM(T) (Note 1) 62 )()( 6 TVNOM TVNOMTVREF − -15 +15 ppm/°C 71M6113 (0.5% ACCURACY CLASS) VNOM Temperature Coefficients: TC1, TC2 TC1 = 251 - TRIMT x 4.60 µV/°C TC2 = -0.433 - TRIMT x 0.000854 µV/°C2 VREF(T) Deviation from VNOM(T) (Note 1) 62 )()( 6 TVNOM TVNOMTVREF − -50 +50 ppm/°C 71M6601, 71M6603, AND 71M6103 (1% ACCURACY CLASS) VNOM Temperature Coefficients: TC1, TC2 TC1 = -34.8 µV/°C TC2 = -0.599 µV/°C2 VREF(T) Deviation from VNOM(T) (Note 1) 45 )()( 6 TVNOM TVNOMTVREF − -100 +100 ppm/°C Note 1: Guaranteed by design; not production tested.
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 14
4.4.6 ADC Converter
Table 11: ADC Converter Specifications PARAMETER CONDITIONS MIN TYP MAX UNITS Input Current INP and INN at GND potential INP 22 µA INN 22 THD (First 10 Harmonics) VIN = 65Hz, 64kpts FFT, Blackman-Harris window -85 dB
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 15
4.5 Typical Performance Data
Figure 6: Wh Error at Room Temperature (71M6203, 100A/0.1A, 60Hz/240V AC) Figure 7: VARh Error at Room Temperature (71M6203, 100A/0.1A, 60Hz/240V AC) - 0.5 - 0.4 - 0.3 - 0.2 - 0.1 0.1 0.2 0.3 0.4 0.5 0.1 1 10 100 90 ° 150 ° VARh Polyphase Load Line with 150µΩ Shunt - 0.5 - 0.4 - 0.3 - 0.2 - 0.1 0.1 0.2 0.3 0.4 0.5 0.1 1 10 100 0 ° 60 ° 300 ° 180 ° Wh Polyphase Load Line with 50µΩ Shunts
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 16 DETAIL A PARTING LINE +3° -5° 0.64 +0.25 -0.23
4.6 Package Outline Drawing
Controlling dimensions are in mm. Figure 8: SOIC-8 Package Outline BOTTOM VIEW SIDE VIEW SEE DETAIL A END VIEW TOP VIEW 5.99 +0.21 -0.05 1.97 2.465 COO 4.93 -0.13 +0.05 0.41 +0.08 -0.06 1.27 BSC 0.33 ±0.08 x 45° 1.63 +0.10 -0.08 0.15 +0.1 - 0.023 SEATING PLANE 1.47 +0.08 -0.07 3.94 +0.05 -0.13 0.20 +0.05 -0.01 LENGTH OF TERMINAL FOR SOLDERING TO SUBSTRATE5 FORMED LEADS ARE PLANAR WITH RESPECT TO EACH OTHER WITHIN 0.735 mm AT SEATING PLANE.
10 COUNTRY OF ORIGIN LOCATION ON PACKAGE BOTTOM IS
OPTIONAL AND DEPENDS ON ASSEMBLY LOCATION. PACKAGE IS COMPLIANT WITH JEDEC STANDARD MS-012. REFERENCE DATUM3 LENGTH AND WIDTH ARE REFERENCE DATUMS AND DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS, BUT INCLUDE MOLD MISMATCH. MEASURED AT THE MOLD PARTING LINE. PROTRUSIONS DO NOT EXCEED 0.1524 mm AT END AND 0.254 mm AT WINDOW. 9 THE APPEARANCE OF PIN #1 I.D. IS OPTIONAL. DIMENSIONING AND TOLERANCES PER ANSI Y14.5 M - 1982 NOTES:
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 17
4.7 IC Pinout
Figure 9: Pinout for 8-Pin SO Package
4.8 Pin Description
Table 12: Pin Description Pin Name Function 1 VCC Supply Voltage Output. A 1.0µF capacitor to GND should be provided.
2 SP Positive Bidirectional Communication Port for the Connection of the Pulse
3 SN Negative Bidirectional Communication Port for the Connection of the Pulse
4 GND Ground (Local Ground). The voltage at the INP and INN pins references to this pin. 5 NC No Connection. No connections must be made to this pin. 6 INP Positive Analog Input from Sensor. This input must be biased towards GND with a 1kΩ resistor. 7 INN Negative Analog Input from Sensor. This input must be biased towards GND with a 1kΩ resistor. 8 TEST Input Used in Factory for Test Purposes. This pin must be connected to GND.
PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 18
5 ORDERING INFORMATION
Table 13: Product Variations Part Application Rated Current (A) Max Input Voltage at INP-INN Pins (mV) Temp Range (°C) Typ Operating Temp Range (°C) Recommended Meter Accuracy Class (%) Max Shunt Resistance (µΩ) 71M6601 1-phase 60 44 -40 to +85 -20 to +60 1 736 71M6603 3-phase 71M6103 3-phase 100 19.6 -20 to +60 196 71M6113 3-phase 0.5 71M6201 1-phase 200 12.6 -40 to +85 0.2 63 71M6203 3-phase Table 14: Packaging Information, Corresponding CE Codes, and Ordering Numbers Part Packaging 71M654x CE Code Ordering Number 71M6601 bulk EQU0-60 71M6601-IL/F 71M6601 tape and reel 71M6601-ILR/F 71M6603 bulk EQU5-60 71M6603-IL/F 71M6603 tape and reel 71M6603-ILR/F 71M6103 bulk EQU5-100 71M6103-IL/F 71M6103 tape and reel 71M6103-ILR/F 71M6113 bulk EQU5-100 71M6113-IL/F 71M6113 tape and reel 71M6113-ILR/F 71M6201* bulk EQU1-200, EQU2-200 71M6201-IL/F 71M6201* tape and reel 71M6201-ILR/F 71M6203* bulk EQU5-200 71M6203-IL/F 71M6203* tape and reel 71M6203-ILR/F Note: All devices are lead(Pb)-free/RoHS-compliant packages. *Future product—contact factory for availability.
6 RELATED INFORMATION
The following documents related to the 71M6xxx are available from Teridian: 71M6543F/H Data Sheet 71M6541D/F-71M6542F Data Sheet 71M6545/H Data Sheet
7 CONTACT INFORMATION
For technical support or more information about Maxim products, contact technical support at www.maxim-ic.com/support.
PDS_6xxx_010 71M6xxx Data Sheet Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products.
REVISION HISTORY
1.0 12/10 Initial release — 1.1 3/11 Figure 1, page 4 (transformer turns ratio 1:1.1) Table 9, page 12 Table 14, page 18 4, 12, 18 1.2 6/11 Removed future status from the 71M6113 parts in Table 14 18