7130-16

7130 ARISTA | Alldatasheet

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Technical content

The Arista 7130 combines ultra-low latency Layer 1 switching with programmable FPGA technology. The series contains:

• The 7130 Connect Layer 1+ network devices with port-to-port latencies as low as 4 nanoseconds.
• The FPGA-enabled devices of the 7130E & L Series which are programmable switches that can host up to 3 FPGAs and can be leveraged to run Arista and third party network applications.
• The 7130 network applications which feature capabilities for ultra-low latency multiplexing in as low as 39 ns (MetaMux), tapping, tap aggregation and sub-nanosecond precise timestamping (MetaWatch), layer 2 switching (SwitchApp) , filtering (MetaProtect), inline timestamping (ExchangeApp) and segmented multiplexing for multi-tenant environments (MultiAc- cess). Arista also provides development toolkits & IP Cores for users to develop their own applications. Layer 1+ switching devices Arista’s 7130 Connect Series Layer 1+ switches are powerful network devices designed for ultra-low latency of just 4 ns. Available in 16, 48 or 96 port device options, they combine a multitude of network functionality on a single device:
• Signal regeneration
• Media conversion
• Port mirroring
• Telemetry, Layer 1+ statistics on every link
• Dynamic patching/link management All network devices are deterministic with virtually undetect- able jitter as they neither buffer or queue data, hence utilizing 100% of available bandwidth. The 7130 Connect platform is packet-aware providing comprehensive packet statistics, signal quality monitoring incl. eye diagrams, and diagnostics. Packet replication provides the ability to sniff packets without affect- ing the data path. FPGA-enabled devices Arista’s 7130E and L devices leverage the latest FPGA technol- ogy to allow companies to develop and deploy cutting-edge network applications. Available in 32, 48 or 96 SFP+ port op- tions, the FPGA switches include a host of functionality:
• Up to 3 FPGAs on a single device
• 5 ns layer 1 switching between network
• 3 ns latency from front panel to FPGA
• Various specifications for RAM, buffers, and transceivers
• Extensive development toolkits and low-latency IP Cores All FPGA-enabled devices are optimized for Arista’s high perfor- mance network applications and can equally be leveraged to run 3rd party partner applications. FPGA application develop- ers can utilize the platform to deploy and deliver their perfor- mance critical apps. In addition to the market-leading FPGA functionality, the devices offer all of the Layer 1+ network functionality also found on the Connect series. MOS operating system MOS is based on Linux and provides a CLI and web interface as well as support for other management protocols. It provides a standard platform with the commands, tools and packages such as syslog, net-snmp, daemons, RPMs, Bash, Python, authentica- tion and security. arista.com EOS operating system & CloudVision EOS is a fully programmable, highly modular, Linux-based OS, using an industry standard CLI and running a single binary software image across the Arista switching family. Architected for resiliency and programmability, EOS has a unique multi-process state sharing architecture that separates state information and packet forwarding from protocol processing and application logic. CloudVision provides a network-wide approach for workload orchestration, workflow automation and real-time telemetry en- abling companies to manage the network with much fewer human resources.

arista.com Technical Specifications

7130 Connect Series 7130-16 7130-48 7130-96

Description 16 port Layer-1 Switch 48 port Layer-1 Switch 96 port Layer-1 Switch SFP+ Interfaces (100M-11.3Gbps) 16 48 96 Port-to-Port Latency 4 ns 4 ns 6 ns RU 1 1 2 Airflow Front-Rear or Rear-Front Front-Rear or Rear-Front Front-Rear or Rear-Front Power Supplies Redundant AC or DC Redundant AC or DC Redundant AC or DC Layer 1 network switches 7130E Series Devices Model FPGA FPGA Quantity SFP+ Ports FPGA Ports RU ePCIE PPS In/ Outs SSD Drive Bays 48EH Xilinx Virtex® UltraScale+™ VU9P 3 48 56 central/ 14 leaf 1 x FPGA-enabled network switches 7130L Series Devices Model FPGA FPGA Quantity SFP+ Ports FPGA Ports Off-Chip RAM RU ePCIE PPS In/ Outs Clock SSD Bay Internal 10G Ports 48L Xilinx Virtex® UltraScale ™ VU7P 1 48 60 4 x 8GB DDR4

2400 ECC

96L Xilinx Virtex® UltraScale ™ VU7P 1 96 58 4 x 8GB DDR4 32LB Xilinx Virtex® UltraScale ™ VU9P 1 32 60 4 x 8GB DDR4 48LB Xilinx Virtex® UltraScale ™ VU9P 1 48 60 4 x 8GB DDR4 96LB Xilinx Virtex® UltraScale ™ VU9P 1 96 58 4 x 8GB DDR4 48LA Xilinx Virtex® UltraScale ™ VU7P 1 48 60 4 x 8GB DDR4 96LA Xilinx Virtex® UltraScale ™ VU7P 1 96 58 4 x 8GB DDR4 32LBA Xilinx Virtex® UltraScale ™ VU9P 1 32 60 4 x 8GB DDR4 48LBA Xilinx Virtex® UltraScale ™ VU9P 1 48 60 4 x 8GB DDR4 96LBA Xilinx Virtex® UltraScale ™ VU9P 1 96 58 4 x 8GB DDR4

arista.com Network Applications Arista offers several powerful network applications to simplify and transform network infrastructure. These applications are designed for use cases including ultra-low latency exchange trading, network visibility and providing vendor or brokerbased shared services. Arista’s 7130E and L Series devices support these applications. Application Key Features Use it for... MetaWatch Advanced network monitoring

• Tapping
• Large scale, lossless tap aggregation
• Multi-port data capture
• Sub-nanosecond precise time stamping
• Deep buffering (32 GB)
• In-depth network monitoring and visibility
• Improved network reliability & troubleshooting problems
• Market data & packet capture
• Accurate latency measurement & monitoring
• Regulatory compliance (MiFID II - RTS 25) MetaMux Low-latency multiplexing
• Data aggregation in 39 nanoseconds
• Deterministic jitter
• Packet statistics
• BGP & PIM support
• Ultra-low latency network connectivity for trading
• Market data fan-out and data aggregation for order entry at nanosecond levels MultiAccess Connection sharing with enhanced security
• Low-latency multiplexing and security
• ACL-based configurable filtering
• Easy to deploy data privacy for connection sharing
• Simplified footprint for both mux and filtering

applications

• Secure network connection sharing
• Providing sponsored access to multiple clients
• Multi tenant exchange access
• Low latency interconnect sharing SwitchApp Low-latency Layer 2 Switching
• 1/10/40G Layer 2 switching, implemented in FPGA
• Ultra-low latency packet forwarding in 94 -132 ns
• Full featured L2 switching pipeline powered by EOS
• Non-blocking bandwidth profiles to provide up to

480 Gbps

• L2 Multicast pub/sub
• Multi-layer MLAG-based leaf-spine fabric, including redundant connections.
• Supporting Colo deployments with multiple concurrent connections
• Optimised distribution of traffic
• Low latency back-office or message bus infrastructure ExchangeApp Inline timestamping enables exchange fairness
• Timestamp at the edge of trading venue networks
• Sub-200ns passthrough latency to apply the timestamp
• Reliable accuracy and timestamp precision
• Accurately synchronise timestamps between multiple ExchangeApp devices
• Increase exchange fairness
• Reduce trading venue latency sensitivity
• Maintain trade order based on edge timestamps
• Reduce complexity and risk of traditional low-latency exchange infrastructures MetaProtect Firewall Low-latency packet filtering in 135 ns
• Architected for ultra-low-latency with forwarding from 135 nanoseconds
• Line rate 10GbE packet uni or bidirectional filtering between port-pairs
• Stateless security policy with up to 510 rules per ACL
• Full packet header logging for non-compliant packets
• Low-latency firewall
• Satisfy InfoSec or regulatory compliance mandates without introducing excessive latency

arista.com IP Cores and Development Toolkits Arista provides a built-in application framework allowing developers to wrap applications into simple packages for deployment, streamlining operational processes. Arista development toolkits enable complete and unfettered access to the facilities provided by the in-system FPGAs. Core Overview Use it for... 10G MAC-PHY IP Core An IP core for interfacing 10 gigabit Ethernet with low latency.

• Implements a low latency Ethernet MAC and Physical layer (10GBASE-R)
• Connects directly to FPGA top level serial transceiver pins and provides separate AXI4 interfaces for RX and TX user data
• Supports Xilinx Virtex® 7, Xilinx Kintex® UltraScale™, and Virtex®
• UltraScale+™ FPGA’s.
• Accelerating your own applications access to the 10G network Mux IP Core • Implements the same functionality as the Arista MetaMux application.
• Allows for customizable radix and number of multiplexing cores e.g. one 4:1, plus a 13:1, plus a 14:1, etc
• Sharing the FPGA between the mux functionality and your own application
• Building a multiplexing app with different configurations than the standard MetaMux application. MMP IP Core Provides a bus that leverages parallel I/O between FPGA’s on the 7130 triple FPGA platforms
• 8 ns intra FPGA latency
• Provides a low latency clock domain crossing FIFO
• Supports four MMP links connecting each Leaf FPGA to the Central FPGA and two MMP links connecting the two Leaf FPGAs together
• The lowest latency, parallel communications bus for your multi FPGA applications
• The fastest way to involve two FPGAs in a trading decision such as “splitting risk logic from trading logic” . Timestamp IP Core (TS IPCore)
• Provides a timestamping and synchronisation engine, implemented as a combination of an encrypted RTL core, with a python based synchronisation daemon.
• When instantiated, the RTL core and software combination allows the system’s OCXO to be synchronised to a PPS, PTP or NTP source.
• Multiple timestamper units can be instantiated to sample asynchronous strobes, providing nanosecond-precise timestamps within the RTL.
• The TS IP Core solution has the following specifications:
• 1ns timestamp resolution with a +/- 2ns precision
• Configurable triggering
• The lowest latency , parallel communications bus for your multi FPGA applications
• The fastest way to involve two FPGAs in a trading decision such as “splitting risk logic from trading logic” . The Arista FPGA Developement Kit (or Arista FDK)* The Arista FDK provides the documentation, libraries and examples which enable developers to build new FPGA applications running on Arista’s 7130 platform. The development environment includes:
• Hardware documentation & information
• IP Cores
• Working example applications, including example build systems
• Support resources to correctly build FPGA applications. The Arista Switch Development Kit for Vitis™ * Vitis is a powerful tool, designed by Xilinx, to better enable FPGA development. Vitis is designed to make it simpler to build FPGA applications using higher-level languages, reusable blocks, and a statically configured Vitis Target Platform in the FPGA. Arista provides support for Vitis development, via these Vitis Target Platforms which run on the LB development standard and support the many Ethernet interfaces provided by the 7130LB devices. The Switch’s internal CPU connects via PCIE to the FPGA, and sup- ports XRT, giving a similar development experience to that of a server with an add-in PCIE card. *Note: The Arista FPGA Development Kit and the Arista Switch Development Kit for Vitis support the MOS Operating System. Support for Arista’s EOS will be added in Q4 2020. EOS application examples will be added in Q4, 2020.

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Santa Clara, CA 95054 Phone: +1-408-547-5500 Fax: +1-408-538-8920 Email: info@arista.com Copyright © 2021 Arista Networks, Inc. All rights reserved. CloudVision, and EOS are registered trademarks and Arista Networks is a trademark of Arista Networks, Inc. All other company names are trademarks of their respective holders. Information in this document is subject to change without notice. Certain features may not yet be available. Arista Networks, Inc. assumes no responsibility for any errors that may appear in this document. May 2021 Ireland—International Headquarters

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Customer Testimonials and Use Cases Tier 1 Investment Bank Arista and Velocimetrics work together to enable a global investment bank to realise a more than tenfold improvement in tick-to-trade latency and implement an advanced monitoring solution to measure its entire network business flow. Electronic Trading Firm The Arista 7130 provides cost-effective access to exchanges at low nanosecond levels – providing the algorithmic asset manager 300 nanoseconds lower latency when sending messages from the trading server to the exchange in comparison to traditional network switches. Deutsche Börse Arista provides lossless data capture, improved network monitoring and precision time- stamping of Deutsche Börse’s co-location network – offering the exchange unprecedented insight into the network.