71124 RENESAS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
  • PDF pages: 9

Technical content

Features

◆◆◆◆◆ 128K x 8 advanced high-speed CMOS static RAM ◆◆◆◆◆ JEDEC revolutionary pinout (center power/GND) for reduced noise. ◆◆◆◆◆ Equal access and cycle times – Commercial: 12/15/20ns – Industrial: 15/20ns ◆◆◆◆◆ One Chip Select plus one Output Enable pin ◆◆◆◆◆ Bidirectional inputs and outputs directly TTL-compatible ◆◆◆◆◆ Low power consumption via chip deselect ◆◆◆◆◆ Available in a 32-pin 400 mil Plastic SOJ. Functional Block Diagram

Description

The IDT71124 is a 1,048,576-bit high-speed static RAM organized as 128K x 8. It is fabricated using high-performance, high-reliability CMOS technology. This state-of-the-art technology, combined with innovative circuit design techniques, provides a cost-effective solution for high-speed memory needs. The JEDEC centerpower/GND pinout reduces noise generation and improves system performance. The IDT71124 has an output enable pin which operates as fast as 6ns, with address access times as fast as 12ns available. All bidirectional inputs and outputs of the IDT71124 are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation. The IDT71124 is packaged in a 32-pin 400 mil Plastic SOJ. ADDRESS DECODER 1,048,576-BIT MEMORY ARRAY I/O CONTROL A16 3514 drw 01 I/O0 -I / O7  CONTROL LOGIC WE OE CS CMOS Static RAM

1 Meg (128K x 8-Bit)

6.422

71124 CMOS Static RAM

1 Meg (128K x 8-bit) Revolutionary Pinout Commercial and Industrial Temperatur e Ranges

Feb.27.20 Capacitance (TA = +25°C, f = 1.0MHz) Symbol Parameter (1 ) Conditions Max. Unit CIN Input Capacitance V IN = 3dV 8 pF CI/O I/O Capacitance V OUT = 3dV 8 pF 3514 tbl 03 Recommended DC Operating Conditions NOTE: 1. This parameter is guaranteed by device characterization, but is not production tested. Symbol Parameter Min. Typ. Max. Unit VCC Supply Voltage 4.5 5.0 5.5 V GND Ground 0 0 0 V VIH Input High Voltage 2.2 ____ VCC +0.5 V VIL Input Low Voltage -0.5 (1 ) ____ 0.8 V 3514 tbl 05 Grade Temperature GND V CC Commercial 0°C to +70°C 0V 5.0V ± 10% Industrial –40°C to +85°C 0V 5.0V ± 10% 3514 tbl 04 Recommended Operating Temperature and Supply Voltage Pin Configuration NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. V TERM must not exceed Vcc + 0.5V. Truth Table(1,2) SOJ Top View A15 CS I/O1 VCC A14 OE I/O7 I/O6 GND I/O5 3514 drw 02 GND 13 20 14 19 15 18 16A7 17 I/O2 I/O3 WE A12 A11 A10 PBG32I/O0 A16 A13 VCC I/O4 71124 NOTES: 1. H = V IH, L = VIL, x = Don't care. 2. VLC = 0.2V, VHC = VCC -0.2V. 3. Other inputs ≥ VHC or ≤ VLC. CS OE WE I/O Function LLH D A T A OUT Read Data LXL D A T A IN Write Data L H H High-Z Output Disabled H X X High-Z Deselected - Standby (I SB) VHC(3 ) X X High-Z Deselected - Standby (I SB1) 3514 tbl 01 Absolute Maximum Ratings (1) Symbol Rating Value Unit VTERM(2) Terminal Voltage with Respect to GND TA Operating Temperature 0 to +70 oC TBIAS Temperature Under Bias -55 to +125 oC TSTG Storage Temperature -55 to +125 oC PT Power Dissipation 1.25 W IOUT DC Output Current 50 mA 3514 tbl 02 NOTE: 1. V IL (min.) = –1.5V for pulse width less than 10ns, once per cycle.

*Including jig and scope capacitance. Figure 2. AC Test Load Figure 1. AC Test Load

  1. All values are maximum guaranteed values.
  2. f MAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing.

6.424 Feb.27.20 (VCC = 5.0V ± 10%, Commercial and Industrial Temperature Ranges) 71124S12(2) 71124S15 71124S20 READ CYCLE tCLZ(1) Chip Select to Output in Low-Z 3 ____ 3 ____ 3 ____ ns tCHZ(1) C h i p D e s e l e c t t o O u t p u t i n H i g h - Z 060708 n s tOLZ(1) Output Enable to Output in Low-Z 0 ____ 0 ____ 0 ____ ns tOHZ(1) O u t p u t D i s a b l e t o O u t p u t i n H i g h - Z 050507 n s tPD(1) Chip Deselect to Power-Down Time ____ 12 ____ 15 ____ 20 ns WRITE CYCLE tOW(1) Output active from End-of-Write 3 ____ 3 ____ 4 ____ ns tWHZ(1) W r i t e E n a b l e t o O u t p u t i n H i g h - Z 050508 n s 3514 tbl 09 NOTES: 1. This parameter guaranteed with the AC load (Figure 2) by device characterization, but is not production tested. 2. There is no industrial temperature offering for the 12ns speed grade.

6.42 Feb.27.20 NOTES: 1. WE is HIGH for Read Cycle. 2. Device is continuously selected, CS is LOW. 3. Address must be valid prior to or coincident with the later of CS transition LOW; otherwise tAA is the limiting parameter. 4. OE is LOW. 5. Transition is measured ±200mV from steady state. Timing Waveform of Read Cycle No. 1 (1) Timing Waveform of Read Cycle No. 2 (1,2,4) ADDRESS 3514 drw 05 OE CS DATAOUT (5) (5) (5) (5) DATAOUT VALIDHIGH IMPEDANCE tAA tRC tOE tACS tOLZ tCHZ tCLZ (3) tOHZ VCC SUPPLY CURRENT tPU tPD ICC ISB DATAOUT ADDRESS 3514 drw 06 tRC tAA tOH tOH DATAOUT VALIDPREVIOUS DATAOUT VALID .

6.426 Feb.27.20 Timing Waveform of Write Cycle No. 1 ( WE Controlled Timing)(1,2,4) Timing Waveform of Write Cycle No. 2 ( CS Controlled Timing)(1,4) NOTES: 1. A write occurs during the overlap of a LOW CS and a LOW WE. 2. OE is continuously HIGH. During a WE controlled write cycle with OE LOW, tWP must be greater than or equal to tWHZ + tDW to allow the I/O drivers to turn off and data to be placed on the bus for the required tDW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the minimum write pulse is the specified tWP. 3. During this period, I/O pins are in the output state, and input signals must not be applied. 4. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high impedance state. CS must be active during the t CW write period. 5. Transition is measured ±200mV from steady state. ADDRESS CS WE DATAOUT DATAIN 3514 drw 07 (5) (2) (5) (5) DATAIN VALID HIGH IMPEDANCE tWC tAW tAS tWHZ tWP tCHZ tOW tDW tDH tWR (3)(3) CS ADDRESS DATAIN 3514 drw 08 tAW tWC tCWtAS tWR tDW tDH DATAIN VALID WE

6.42 Feb.27.20 S Power XX Speed X Package X Process/ Temperature Range Blank I(1) Y 400-mil SOJ (PBG32) Device Type Speed in nanoseconds 3514 drw 09

71124 X X

Commercial (0°C to +70°C) Industrial (-40°C to +85°C)

Ordering Information

  • No industrial temp on 12ns speed Orderable Part Information Speed (ns) Orderable Part ID Pkg. Code Pkg. Type Temp. Grade 12 71124S12YG PBG32 SOJ C 71124S12YG8 PBG32 SOJ C 15 71124S15YG PBG32 SOJ C 71124S15YG8 PBG32 SOJ C 71124S15YGI PBG32 SOJ I 71124S15YGI8 PBG32 SOJ I 20 71124S20YG PBG32 SOJ C 71124S20YG8 PBG32 SOJ C 71124S20YGI PBG32 SOJ I 71124S20YGI8 PBG32 SOJ I NOTE: 1. Contact your local sales office for industrial temp range for other speeds, packages and powers.

6.428 Feb.27.20 Datasheet Document History 08/05/99: Updated to new format Pg. 3 Removed military entries on DC table Pg. 4 Removed Note 1 and renumbered footnotes Pg. 6 Revised footnotes on Write Cycle No. 1 diagram 08/13/99: Pg. 8 Added Datasheet Document History 09/30/99: Pg. 1, 3, 4, 7 Added 12ns, 15ns, and 20ns industrial temperature speed grade offerings 02/18/00: Pg. 3 Revise I SB for Industrial Temperature offerings to meet commercial specifications 03/14/00: Pg. 3 Revised I SB to accommodate speed functionality 04/01/00: Pg.4 Tightened tAW, tCW, tWP and tDW within the AC Electrical Characteristics 08/09/00: Not recommended for new designs 02/01/01: Removed "Not recommended for new designs" 10/23/08: Pg.7 Removed "IDT" from the orderable part number 04/02/13: Pg.1 Removed 12ns speed from the Industrial temp offering. Removed IDT in reference to fabrication Pg.3 Removed the industrial 12ns speed grade information from the DC Electrical Chars table 07 Pg.4 Added footnote 2 to AC Electrical Chars table 09 to indicate that there is no industrial 12ns speed Pg.7 Added Tape & Reel and Green designators to the ordering information. Added a footnote to the ordering information to indicate that there is no industrial 12ns speed offering 02/27/20: Pg. 1-9 Rebranded as Renesas datasheet Pg. 2-7 Updated package code Pg. 7 Added Industrial temp footnote to the Ordering Information Pg. 7 Added Orderable Part Information table

© 202 Renesas Electronics Corporation. All rights reserved. IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. Renesas grants you permission to use these resources only for development of an application that uses Renesas products. Other reproduction or use of these resources is strictly prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property. Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims, damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use o any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products. ('LVFODLPHURev.1.0 Mar 2020) Corporate Headquarters Contact Information TOYOSU FORESIA, 3-2-24 Toyosu, For further information on a product, technology, the most Koto-ku, Tokyo 135-0061, Japan up-to-date version of a document, or your nearest sales www.renesas.com office, please visit: www.renesas.com/contact/ Trademarks Renesas and the Renesas logo are trademarks of Renesas Electronics Corporation. All trademarks and registered trademarks are the property of their respective owners.