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SSM70T03H,J De N-CHANNEL ENHANCEMENT-MODE POWER MOSFET Low gate-charge D BVopss 30V Simple drive requirement Robson) 9mQ Fast switching Ip 60A G Ss Description > The SSM70TO3H is in a TO-252 package, which is widely used for Gog TO-252 (H commercial and industrial surface-mount applications, and is well suited ~ (H) for low voltage applications such as DC/DC converters. The through-hole version, the SSM70T03J in TO-251, is available for low-footprint vertical mounting. These devices are manufactured with an advanced process, providing improved on-resistance and switching performance. The devices have a maximum junction temperature rating of 175°C for improved thermal 6 margin and reliability. 8 ¥ °s 70-254 (d) Absolute Maximum Ratings Symbol | Parameter |Rating’ | Units | Drain-Source Voltage Is@Ts=25°C _|Continuous Drain Current, Ves @ 10V ee ee | Is>@T=100°C [Continuous Drain Current, Ves @ 10V Pulsed Drain Current’ P5@Ts=25°C _ [Total Power Dissipation | linear DeratingFactor 6 we Single Pulse Avalanche Energy” -85 to 175 Thermal Data Thermal Resistance Junction-case Max. Thermal Resistance Junction-ambient Max. Dal 8/17/2004 Rev.2.2 www SiliconStandard.com 1 of 5

< SILICON BS MEReeS SSM70T03H,J Electrical Characteristics@T,=25°C(unless otherwise specified) [ symisi [Parameter ———|_—_Tertcontone | in| | wax | Ut [BVoss__[Drain-Source Breakdown Voltage |Vas=0V,b=250uA | 30 | - | - | v | [ABV /ATj [breakdown Votage Temperature Coefcent[Reference to 26°C, to=tmA | = [o.osz|_- | vre| JRosicw [Static Drain-Source On-Resistance [Vasrtov.texs3a_ |= |= | 9 | ma | a [Vesey [Gate Threshold Vottage |VnseVcsne250uA | | - [3 |v | le | SSS wmtovwszaq——SCSC*dC(S «iP | | SY a cee Ja, [Total Gate Charge” = 3 |= [tes] - [ne | JQ, [Gate-Source Charge Vos=20V | - [5 [ - [nc | JO, | Gate-Drain (Miter) Charge __[Vase4.5V L- [aoa — [ne | tion [Turn-on Delay Time? |Vns=18V | - [a2 - [ns | fe Rise Time fo | = | 105 [= [ins | fuss —___[Turwoff Delay Time | Re= 3.92. Ves=10V [art — [ns | Rr=0.450 | - [est - | ns] loss [Input Capacitance Ves 0V |= [rass] - | pF | [Coss [Output Capacitance | Vns=25V | - [2s] - | pr | f1.0MHz [ - [ivo[ - [pF | Source-Drain Diode [symbol [Parameter Test Conditions Min. | Typ. | Max. J Units | [Vso Forward OnVottage’” Ic 60AVesrov TT 3 |v | ee eee eee a. Reverse Recovery Charge | dlidt=100A/ys P- fiz qT - [nc | Notes: 1.Pulse width limited by safe operating area. 2.Pulse width <300us , duty cycle <2%. 3.Mp=25V , L=100UH , Re=25Q jIns=24A. ee 8/17/2004 Rev.2.2 www. SiliconStandard.com 20f5

SSM70TO3H,J el i a frome fo | 7 8.0V . | a < ZO 6.0V. : g = g - [- - - Ant . Vos, Drain-to-Source Voltage ” V ps » Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics p=33A T)=33A e=29°C | Vasst0v" 1 3 3 CZ Sy $ ant ‘ o ‘ ' A ue “Gs 2 100 m5 Ves » Gate-to-Source Voltage (V) T, , Junction Temperature (°C) Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 2s Tja178° an Vsp_, Source-to-Drain Voltage (V) T, , Junction Temperature (°C } Fig 5. Forward Characteristic of Fig 6. Gate Threshold Voltage vs. Reverse Diode Junction Temperature Tl 8/17/2004 Rev.2.2 www.SiliconStandard.com 3 of 5
SSM70TO3H,J ee b two f=1.0MHz “ LY nan i vser a 5 8 Cos: ‘ o “ x 0 am & s z & Og. Total Gate Charge (nO) V 95 , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics ‘ > FSS = Ee rl yon og Foner wee Ss CUTIE TT te 4. N 110us 5 LaY Z Kt < wy, 7 al 2 Of 2] ov Sous By arn A Si wee & eA Ee i ; \\! B Ee ZA oar ». i « KK Stims FS Atte “LLL Te=28°C XR : tt a | Single Pulse \\ Jims 2 bute 100ms Peak TP gs Maw 1 ‘DC Vos, Drain-to-Source Voltage (V) : t, Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig10. Effective Transient Thermal Impedance Vv, Vo hs f\\ 90% \\/ i ' / Qe \\. Q__% tyon) taco t, Charge Q Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform oo OOO OO OOOO OO 8/17/2004 Rev.2.2 www.SiliconStandard.com 40f5

SSM70T03H,J Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. eo 8/1712004 Rev.2.2 www.SiliconStandard.com 5 of 5