70L02H

SSM70L02H SSC | Alldatasheet

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www.SiliconStandard.com 1 of 6 SSM70L02H,J N-CHANNEL ENHANCEMENT MODE POWER MOSFET Low Gate Charge BV DSS 25V Simple Drive Requirement R DS(ON) 9mΩ Fast Switching I D 66A

Description

ID@TC=25℃ A ID@TC=100℃ A IDM A PD@TC=25℃ W W/℃ TSTG ℃ TJ ℃ Symbol Value Unit Rthj-case Thermal Resistance Junction-case Max. 1.9 ℃/W Rthj-amb Thermal Resistance Junction-ambient Max. 110 ℃/W Thermal Data Parameter Pulsed Drain Current1 210 Operating Junction Temperature Range -55 to 150 Linear Derating Factor 0.53 Storage Temperature Range Total Power Dissipation 66 -55 to 150 Continuous Drain Current, VGS @ 10V 66 Continuous Drain Current, VGS @ 10V 42 Drain-Source Voltage 25 Gate-Source Voltage Parameter Rating The SSM70L02H is in the TO-252 package, which is widely preferred for commercial and industrial surface mount applications, and is well suited for low-voltage applications such as DC/DC converters. The through-hole version (SSM70L02J) is available for low-footprint applications. ± 20 G D S TO-251(J) G D S TO-252(H) G D S Rev.2.01 6/26/2003

www.SiliconStandard.com 2 of 6 SSM70L02H,J Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain-Source Breakdown Voltage V GS=0V, ID=250uA 25 - - V ΔBVDSS/ΔTj Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA - 0.037 -V / ℃ RDS(ON) Static Drain-Source On-Resistance V GS=10V, ID=33A - - 9 mΩ VGS=4.5V, ID=20A - - 17 mΩ VGS(th) Gate Threshold Voltage V DS=VGS, ID=250uA 1 - 3 V gfs Forward Transconductance V DS=10V, ID=33A - 25 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=25V, VGS=0V - - 1 uA Drain-Source Leakage Current (Tj=150oC) VDS=20V, VGS=0V - - 25 uA IGSS Gate-Source Leakage V GS=- - nA Qg Total Gate Charge2 ID=33A - 23 - nC Qgs Gate-Source Charge V DS=20V - 3 - nC Qgd Gate-Drain ("Miller") Charge V GS=5V - 17 - nC td(on) Turn-on Delay Time2 VDS=15V - 8.8 - ns tr Rise Time I D=33A - 95 - ns td(off) Turn-off Delay Time R G=3.3Ω,VGS=10V - 24 - ns tf Fall Time R D=0.45Ω -1 4- ns Ciss Input Capacitance V GS=0V - 790 - pF Coss Output Capacitance V DS=25V - 475 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 195 - pF Source-Drain Diode Symbol Parameter Test Conditions Min. Typ. Max. Units IS Continuous Source Current ( Body Diode ) VD=VG=0V , VS=1.26V - - 66 A ISM Pulsed Source Current ( Body Diode )1 - - 210 A VSD Forward On Voltage2 Tj=25℃, IS=66A, VGS=0V - - 1.26 V Notes: 1.Pulse width limited by safe operating area. 2.Pulse width <300us , duty cycle <2%. ±100± 20V± 20V Rev.2.01 6/26/2003

www.SiliconStandard.com 3 of 6 SSM70L02H,J Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature 100 120 140 0123456 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C =150 o C V G =4.0V V G =6.0V V G =8.0V V G =10V V G =5.0V 0.60 0.80 1.00 1.20 1.40 1.60 1.80 -50 0 50 100 150 T j , Junction Temperature ( o C) Normalized RDS(ON) V G =10V I D =10A 23456789 1 0 1 1 V GS (V) RDSON (m ΩΩΩΩ) I D =10A T c =25 ℃℃℃℃ 100 150 200 250 0123456 V DS , Drain-to-Source Voltage (V) ID , Drain Current (A) T C =25 o C V G =4.0V V G =5.0V V G =6.0V V G =8.0V V G =10V Rev.2.01 6/26/2003

www.SiliconStandard.com 4 of 6 SSM70L02H,J Fig 5. Maximum Drain Current v.s. Fig 6. Typical Power Dissipation Case Temperature Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance 25 50 75 100 125 150 T c , Case Temperature ( o C) ID , Drain Current (A) 0 50 100 150 T c ,Case Temperature ( o C) PD (W) 100 1000 1 10 100 V DS (V) ID (A) T c =25 o C Single Pulse 100us 1ms 10ms 100ms 10us 0.01 0.1 t , Pulse Width (s) Normalized Thermal Response (R thjc) PDM Duty factor = t/T Peak Tj = PDM x Rthjc + TC t T 0.02 0.01 0.05 0.1 0.2 DUTY=0.5 SINGLE PULSE Rev.2.01 6/26/2003

www.SiliconStandard.com 5 of 6 SSM70L02H,J Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics Fig 11. Forward Characteristic of Fig 12. Gate Threshold Voltage v.s. Reverse Diode Junction Temperature -50 0 50 100 150 T j , Junction Temperature( o C) VGS(th) (V) 0.1 100 V SD (V) IS(A) T j =25 o C T j =150 o C 0 5 10 15 20 25 30 35 40 45 50 Q G , Total Gate Charge (nC) VGS , Gate to Source Voltage (V) I D =33A V DS =20V 100 1000 10000 1 6 11 16 21 V DS (V) C (pF) f=1.0MHz Ciss Coss Crss Rev.2.01 6/26/2003

www.SiliconStandard.com 6 of 6 SSM70L02H,J Fig 13. Switching Time Circuit Fig 14. Switching Time Waveform Fig 15. Gate Charge Circuit Fig 16. Gate Charge Waveform td(on) tr td(off) tf VDS VGS 10% 90% Q VG QGS QGD QG Charge 0.5x RATED VDS TO THE OSCILLOSCOPE 10 V D G S VDS VGS RG RD 0.8 x RATED V DS TO THE OSCILLOSCOPE D G S VDS VGS IDIG 1~ 3 mA Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.2.01 6/26/2003